Patents by Inventor Masayuki Inuga

Masayuki Inuga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7943413
    Abstract: A method for manufacturing a vibration sensor including forming a sacrifice layer at one part of a front surface of a semiconductor substrate of monocrystalline silicon with a material isotropically etched by an etchant for etching the semiconductor substrate, forming a thin film protective film with a material having resistance to the etchant on the sacrifice layer and the front surface of the semiconductor substrate at a periphery of the sacrifice layer, forming a thin film of monocrystalline silicon, polycrystalline silicon, or amorphous silicon on an upper side of the sacrifice layer, opening a backside etching window in a back surface protective film having resistance to the etchant for etching the semiconductor substrate formed on a back surface of the semiconductor substrate, forming a through-hole in the semiconductor substrate by etching the semiconductor substrate anisotropically by using crystal-oriented etching by applying the etchant from the back surface window, then etching the sacrifice layer
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: May 17, 2011
    Assignee: OMRON Corporation
    Inventors: Takashi Kasai, Yasuhiro Horimoto, Fumihito Kato, Masaki Munechika, Shuichi Wakabayashi, Toshiyuki Takahashi, Masayuki Inuga
  • Publication number: 20100038734
    Abstract: A method for manufacturing a vibration sensor including forming a sacrifice layer at one part of a front surface of a semiconductor substrate of monocrystalline silicon with a material isotropically etched by an etchant for etching the semiconductor substrate, forming a thin film protective film with a material having resistance to the etchant on the sacrifice layer and the front surface of the semiconductor substrate at a periphery of the sacrifice layer, forming a thin film of monocrystalline silicon, polycrystalline silicon, or amorphous silicon on an upper side of the sacrifice layer, opening a backside etching window in a back surface protective film having resistance to the etchant for etching the semiconductor substrate formed on a back surface of the semiconductor substrate, forming a through-hole in the semiconductor substrate by etching the semiconductor substrate anisotropically by using crystal-oriented etching by applying the etchant from the back surface window, then etching the sacrifice layer
    Type: Application
    Filed: July 20, 2007
    Publication date: February 18, 2010
    Applicant: OMRON CORPORATION
    Inventors: Takashi Kasai, Yasuhiro Horimoto, Fumihito Kato, Masaki Munechika, Shuichi Wakabayashi, Toshiyuki Takahashi, Masayuki Inuga