Patents by Inventor Masayuki Katagiri

Masayuki Katagiri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180105488
    Abstract: The present invention provides a novel cyanate ester compound which has excellent solvent solubility and from which a hardened product having a low coefficiency of thermal expansion and excellent flame retardancy and heat resistance is obtained. The present invention is a cyanate ester compound obtained by cyanating a naphthol-dihydroxynaphthalene aralkyl resin or a dihydroxynaphthalene aralkyl resin.
    Type: Application
    Filed: February 19, 2016
    Publication date: April 19, 2018
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masayuki KATAGIRI, Tatsuya SHIMA, Keita TOKUZUMI
  • Patent number: 9949369
    Abstract: The present invention is a cyanate ester compound represented by the following formula (1): wherein Ar represents an aromatic ring; R1 each independently represents a hydrogen atom, an alkyl group, or an aryl group; n each independently represents an integer of 1 to 3; m+n is the same as the total number of hydrogen atoms in a monovalent aromatic group containing the aromatic ring and the hydrogen atoms; R2 represents a hydrogen atom (excluding a case where Ar represents a benzene ring; n each represents 1; R1 represents a hydrogen atom; m each represents 4, and a cyanate group is bonded to the benzene ring in the 4-position relative to an adamantyl group), or an alkyl group having 1 to 4 carbon atoms; and R3 represents a hydrogen atom or an alkyl group having 1 to 4 carbon atoms.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: April 17, 2018
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masayuki Katagiri, Keita Tokuzumi, Makoto Tsubuku, Tomoo Tsujimoto, Kenji Arii, Takashi Kobayashi, Masanobu Sogame, Yoshinori Mabuchi, Sotaro Hiramatsu
  • Patent number: 9924593
    Abstract: A graphene wiring structure of an embodiment has a substrate, a metal part on the substrate, multilayered graphene connected to the metal part, a first insulative film on the substrate, and a second insulative film on the substrate. The metal part is present between the first insulative film and the second insulative film. Edges of the multilayered graphene are connected to the metal part. A side face of the first insulative film vertical to the substrate opposes a side face of the second insulative film vertical to the substrate. A first outer face of the multilayered graphene is in physical contact with a first side face of the first insulative film vertical to the substrate. A second outer face of the multilayered graphene is in physical contact with a second side face of the second insulative film vertical to the substrate.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: March 20, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadashi Sakai, Yuichi Yamazaki, Hisao Miyazaki, Masayuki Katagiri, Taishi Ishikura, Akihiro Kajita
  • Publication number: 20180012846
    Abstract: A graphene structure of an embodiment includes multilayer graphene laminated with graphene sheets, and a first interlayer material being present between the graphene sheets of the multilayer graphene and containing a multimer of molybdenum oxide.
    Type: Application
    Filed: March 1, 2017
    Publication date: January 11, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hisao MIYAZAKI, Takashi YOSHIDA, Masayuki KATAGIRI, Yuichi YAMAZAKI, Tadashi SAKAI
  • Publication number: 20170316973
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.
    Type: Application
    Filed: July 17, 2017
    Publication date: November 2, 2017
    Inventors: Masayuki KITAMURA, Atsuko SAKATA, Makoto WADA, Yuichi YAMAZAKI, Masayuki KATAGIRI, Akihiro KAJITA, Tadashi SAKAI, Naoshi SAKUMA, Ichiro MIZUSHIMA
  • Patent number: 9761530
    Abstract: Graphene wiring of an embodiment has a graphene intercalation compound including a multilayer graphene having graphene sheets stacked therein and an interlayer substance disposed between layers of the multilayer graphene, and an interlayer cross-linked layer connected to a side surface of the multilayer graphene. The interlayer cross-linked layer has a cross-linked molecular structure including multiple bonded molecules cross-linking the graphene sheets included in the multilayer graphene.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: September 12, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisao Miyazaki, Tadashi Sakai, Yuichi Yamazaki, Masayuki Katagiri
  • Publication number: 20170256499
    Abstract: A graphene wiring structure of an embodiment has a multilayered graphene having a plurality of planar graphene sheets laminated, and a first interlayer substance being a metal oxyhalide between the plurality of planar graphene sheets.
    Type: Application
    Filed: December 27, 2016
    Publication date: September 7, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisao MIYAZAKI, Tadashi Sakai, Masayuki Katagiri, Yuichi Yamazaki
  • Publication number: 20170229301
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.
    Type: Application
    Filed: September 18, 2012
    Publication date: August 10, 2017
    Inventors: Masayuki KITAMURA, Atsuko SAKATA, Makoto WADA, Yuichi YAMAZAKI, Masayuki KATAGIRI, Akihiro KAJITA, Tadashi SAKAI, Naoshi SAKUMA, Ichiro MIZUSHIMA
  • Publication number: 20170226263
    Abstract: The present invention provides a cyanic acid ester compound having a structure represented by the following general formula (1): wherein n represents an integer of 1 or larger.
    Type: Application
    Filed: November 24, 2015
    Publication date: August 10, 2017
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Takashi KOBAYASHI, Kentaro TAKANO, Masayuki KATAGIRI, Keita TOKUZUMI, Tatsuya SHIMA
  • Patent number: 9679851
    Abstract: A graphene wring structure of an embodiment includes multilayer graphene, a first interlayer compound existing in an interlayer space of the multilayer graphene, and a second interlayer compound existing in the interlayer space of the multilayer graphene. The second interlayer compound containing at least one of an oxide, a nitride and a carbide.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: June 13, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadashi Sakai, Hisao Miyazaki, Masayuki Katagiri, Yuichi Yamazaki
  • Patent number: 9657173
    Abstract: A curable resin composition which can achieve a cured product in which the generation of cracks upon curing is suppressed and which has both a low thermal expansion rate and a low water absorbability is provided. The curable resin composition comprises: at least a cyanate ester compound (A) represented by the following formula (I); a metal complex catalyst (B); and an additive (C), wherein the additive (C) contains any one or more selected from the group consisting of a compound represented by the following general formula (II), a compound represented by the following general formula (III), and a tertiary amine.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: May 23, 2017
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Makoto Tsubuku, Taketo Ikeno, Masayuki Katagiri, Tomoo Tsujimoto
  • Publication number: 20170077178
    Abstract: A nonvolatile storage device of an embodiment includes a first wiring layer extending in a first direction, a second wiring layer extending in a second direction intersecting with the first direction, a conductive layer between the first wiring layer and the second wiring layer at an intersection of the first wiring layer and the second wiring layer, and a resistance change region including at least one of an oxide, a nitride, and an oxynitride in the first wiring layer. The resistance change region exists in the first wiring layer including an interface between the first wiring layer and the conductive layer.
    Type: Application
    Filed: August 30, 2016
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hisao MIYAZAKI, Tadashi SAKAI, Yuichi YAMAZAKI, Masayuki KATAGIRI
  • Publication number: 20170079138
    Abstract: A graphene wiring structure of an embodiment has a substrate, a metal part on the substrate, multilayered graphene connected to the metal part, a first insulative film on the substrate, and a second insulative film on the substrate. The metal part is present between the first insulative film and the second insulative film. Edges of the multilayered graphene are connected to the metal part. A side face of the first insulative film vertical to the substrate opposes a side face of the second insulative film vertical to the substrate. A first outer face of the multilayered graphene is in physical contact with a first side face of the first insulative film vertical to the substrate. A second outer face of the multilayered graphene is in physical contact with a second side face of the second insulative film vertical to the substrate.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tadashi SAKAI, Yuichi YAMAZAKI, Hisao MIYAZAKI, Masayuki KATAGIRI, Taishi ISHIKURA, Akihiro KAJITA
  • Patent number: 9475761
    Abstract: A method for efficiently producing a cyanogen halide with suppressed side effects, and a method for producing a high-purity cyanate ester compound at a high yield includes contacting a halogen molecule with an aqueous solution containing hydrogen cyanide and/or a metal cyanide, so that the hydrogen cyanide and/or the metal cyanide is allowed to react with the halogen molecule in the reaction solution to obtain the cyanogen halide, wherein more than 1 mole of the hydrogen cyanide or the metal cyanide is used based on 1 mole of the halogen molecule, and when an amount of substance of an unreacted hydrogen cyanide or an unreacted metal cyanide is defined as mole (A) and an amount of substance of the generated cyanogen halide is defined as mole (B), the reaction is terminated in a state in which (A):(A)+(B) is between 0.00009:1 and 0.2:1.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: October 25, 2016
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masayuki Katagiri, Yuuichi Sugano, Taketo Ikeno, Makoto Tsubuku, Keita Tokuzumi, Kenj Arii, Takashi Kobayashi, Masanobu Sogame, Yoshinori Mabuchi, Yoshihiro Kato
  • Publication number: 20160284646
    Abstract: A graphene wring structure of an embodiment includes multilayer graphene, a first interlayer compound existing in an interlayer space of the multilayer graphene, and a second interlayer compound existing in the interlayer space of the multilayer graphene. The second interlayer compound containing at least one of an oxide, a nitride and a carbide.
    Type: Application
    Filed: February 29, 2016
    Publication date: September 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tadashi SAKAI, Hisao MIYAZAKI, Masayuki KATAGIRI, Yuichi YAMAZAKI
  • Patent number: 9453126
    Abstract: There is provided a novel dicyanatophenyl-based difunctional cyanate ester which is in a liquid form at ordinary temperature and can obtain a cured product having an excellent low thermal expansion rate. There is disclosed a cyanate ester compound represented by the following formula (I): (wherein R1 represents a hydrocarbon group having 2 to 20 carbon atoms).
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: September 27, 2016
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Makoto Tsubuku, Taketo Ikeno, Masayuki Katagiri, Tomoo Tsujimoto
  • Publication number: 20160276219
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a graphene film on a catalytic layer, removing a part of the graphene film to form an exposed side surface of the graphene film, introducing dopant into the graphene film from the exposed side surface, and forming a graphene interconnect by patterning the graphene film into which the dopant is introduced.
    Type: Application
    Filed: August 31, 2015
    Publication date: September 22, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Makoto WADA, Yuichi YAMAZAKI, Hisao MIYAZAKI, Akihiro KAJITA, Tatsuro SAITO, Atsunobu ISOBAYASHI, Taishi ISHIKURA, Masayuki KATAGIRI, Tadashi SAKAI
  • Publication number: 20160262263
    Abstract: The present invention is a cyanate ester compound represented by the following formula (1): wherein Ar represents an aromatic ring; R1 each independently represents a hydrogen atom, an alkyl group, or an aryl group; n each independently represents an integer of 1 to 3; m+n is the same as the total number of hydrogen atoms in a monovalent aromatic group containing the aromatic ring and the hydrogen atoms; R2 represents a hydrogen atom (excluding a case where Ar represents a benzene ring; n each represents 1; R1 represents a hydrogen atom; m each represents 4, and a cyanate group is bonded to the benzene ring in the 4-position relative to an adamantyl group), or an alkyl group having 1 to 4 carbon atoms; and R3 represents a hydrogen atom or an alkyl group having 1 to 4 carbon atoms.
    Type: Application
    Filed: October 24, 2014
    Publication date: September 8, 2016
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masayuki KATAGIRI, Keita TOKUZUMI, Makoto TSUBUKU, Tomoo TSUJIMOTO, Kenji ARII, Takashi KOBAYASHI, Masanobu SOGAME, Yoshinori MABUCHI, Sotaro HIRAMATSU
  • Patent number: 9431345
    Abstract: According to one embodiment, a semiconductor device includes a metal interconnect and a graphene interconnect which are stacked to one another.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: August 30, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Sakata, Masayuki Kitamura, Makoto Wada, Masayuki Katagiri, Yuichi Yamazaki, Akihiro Kajita
  • Patent number: 9379060
    Abstract: A graphene wiring has a substrate, a catalyst layer on the substrate, a graphene layer on the catalyst layer, and a dopant layer on a side surface of the graphene layer. An atomic or molecular species is intercalated in the graphene layer or disposed on the graphene layer.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: June 28, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisao Miyazaki, Tadashi Sakai, Masayuki Katagiri, Yuichi Yamazaki, Naoshi Sakuma, Mariko Suzuki