Patents by Inventor Masayuki Kitamura

Masayuki Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133008
    Abstract: An amorphous alloy soft magnetic powder contains a particle having a composition with a compositional formula (Fe1-xCrx) a (Si1-yBy)100-a-bCb expressed by an atomic ratio, in which 0<x?0.06, 0.3?y?0.7, 70.0?a?81.0, and 0<b?3.0, and when XAFS measurement is performed with an analysis depth set to a bulk, an obtained Fe—K absorption edge XANES spectrum has a first absorption edge structure having a peak A present in a range of 7113±1 eV and a first continuous band structure positioned at a higher energy side than the first absorption edge structure, and an intensity of the peak A at 7113 eV is 0.60 or more and 0.90 or less when an intensity of the first continuous band structure is 1.
    Type: Application
    Filed: July 24, 2023
    Publication date: April 25, 2024
    Inventors: Atsushi NAKAMURA, Takuma ENOMOTO, Kai KITAMURA, Junya ABE, Masayuki OMOTO
  • Publication number: 20240123823
    Abstract: A display system includes an image display part displaying an image indicating a mode selected in a driving device of a vehicle having a plurality of modes. The image display part displays all images indicating each of the plurality of modes, and displays the image indicating the selected mode to be different in at least one of color, brightness, character format, and size from an image indicating a non-selected mode.
    Type: Application
    Filed: September 7, 2023
    Publication date: April 18, 2024
    Applicant: OMRON Corporation
    Inventors: Masayuki SHINOHARA, Yutaka OKAYASU, Gouo KURATA, Yuto MORI, Masao MISHINA, Norikazu KITAMURA
  • Publication number: 20240130125
    Abstract: A semiconductor device includes a conductive film containing molybdenum and a metal element. The metal element has a melting point lower than the melting point of molybdenum and forms a complete solid solution with molybdenum. The metal element as a material for composing the conductive film is at least one selected from the group consisting of, for example, titanium, vanadium, and niobium.
    Type: Application
    Filed: June 28, 2023
    Publication date: April 18, 2024
    Applicant: Kioxia Corporation
    Inventors: Katsuaki NATORI, Hiroshi TOYODA, Masayuki KITAMURA, Takayuki BEPPU, Koji YAMAKAWA, Kenichiro TORATANI
  • Patent number: 11940114
    Abstract: An optical device includes: a light guide plate having a group of optical-path deflectors configured to change the optical path of light from a first light source to form an image in the space within a first angle range, and change the optical path of light from a second light source to form an image in the space within a second angle range, wherein the first angle range and the second angle range are separated from each other or adjoining each other.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: March 26, 2024
    Assignee: OMRON Corporation
    Inventors: Yoshihiko Takagi, Masayuki Shinohara, Yasuhiro Tanoue, Gouo Kurata, Norikazu Kitamura
  • Publication number: 20240081073
    Abstract: A semiconductor device according to the present disclosure includes a first insulating film, a second insulating film, and a tungsten film provided between the first insulating film and the second insulating film, the tungsten film having a crystal particle, wherein a thickness T of the tungsten film in a first direction from the first insulating film toward the second insulating film and an average particle size APS of the crystal particle satisfy APS/T?2 is satisfied.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: Kioxia Corporation
    Inventors: Ryosuke UMINO, Daisuke IKENO, Masayuki KITAMURA, Akihiro KAJITA
  • Publication number: 20230422500
    Abstract: A semiconductor device includes a plurality of insulating layers, a plurality of conductive layers that are formed alternately with the plurality of insulating layers, an interlayer film, and a channel. The interlayer film is different from the conductive layer, has a crystal structure of a hexagonal crystal system, and is formed between at least one of the insulating layers and at least one of the conductive layers. The channel penetrates through the plurality of conductive layers, the interlayer film, and the plurality of insulating layers.
    Type: Application
    Filed: February 22, 2023
    Publication date: December 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Tomotaka ARIGA, Masayuki KITAMURA, Hiroshi TOYODA
  • Publication number: 20230295801
    Abstract: According to one embodiment, a film forming method includes alternately performing a first process including at least two times of a first sequence and a second process including at least one time of a second sequence. The first sequence includes supplying a film forming gas into a film forming chamber, supplying a first purge gas into the film forming chamber, supplying a first reduction gas into the film forming chamber, and supplying a second purge gas into the film forming chamber, in order, and the second sequence includes supplying a second reduction gas into the film forming chamber, and supplying a third purge gas into the film forming chamber, in order.
    Type: Application
    Filed: September 13, 2022
    Publication date: September 21, 2023
    Applicant: Kioxia Corporation
    Inventors: Shigeru KINOSHITA, Hiroshi TOYODA, Satoshi WAKATSUKI, Masayuki KITAMURA, Naomi FUKUMAKI
  • Publication number: 20230298890
    Abstract: A method for manufacturing a semiconductor device is disclosed. The method includes forming a mask layer containing a first metal and a first halogen on a film to be processed. The method includes patterning the mask layer. The method includes performing a treatment on the mask layer to decrease the concentration of the first halogen. The method includes processing the film using the treated mask layer as a mask.
    Type: Application
    Filed: August 19, 2022
    Publication date: September 21, 2023
    Applicant: Kioxia Corporation
    Inventor: Masayuki Kitamura
  • Patent number: 11725281
    Abstract: A gas introduction structure for supplying a processing gas into a vertically-elongated processing container, includes a processing gas supply pipe extending along a longitudinal direction of the processing container in the processing container and having a plurality of gas discharge holes formed along the longitudinal direction, the processing gas supply pipe configured so that the processing gas is introduced from one end toward the other end thereof, wherein a dilution gas is supplied to a portion of the processing gas supply pipe that is closer to the other end than the one end of the processing gas supply pipe.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: August 15, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shingo Hishiya, Sung Duk Son, Masayuki Kitamura, Satoru Ogawa
  • Publication number: 20230253311
    Abstract: A semiconductor device includes an interconnect including (i) a first layer, and (ii) a second layer provided on the first layer and including copper. The device also includes a plug provided on the interconnect and including (a) a third layer including titanium and nitrogen, and (b) a fourth layer provided on the third layer and including tungsten. A concentration of chlorine in the third layer is less than or equal to 5.0 × 1021 atoms/cm3, and a concentration of oxygen at the interface between the third layer and the fourth layer is less than or equal to 5.0 × 1021 atoms/cm3.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Applicant: Kioxia Corporation
    Inventors: Masayuki KITAMURA, Atsushi KATO, Hiroaki MATSUDA
  • Publication number: 20230247833
    Abstract: According to one embodiment, a semiconductor memory device includes a stacked body in which a plurality of conductive layers containing molybdenum (Mo) are stacked to be spaced apart from each other in a first direction, a pillar structure including a semiconductor layer extending in the first direction in the stacked body, a partition structure extending in the first direction and in a second direction intersecting the first direction in the stacked body, and dividing the stacked body in a third direction intersecting the first and second directions, and a plurality of intermediate layers, each including a portion provided between the pillar structure and a corresponding one of the conductive layers, and containing a compound of molybdenum (Mo) and boron (B).
    Type: Application
    Filed: September 14, 2022
    Publication date: August 3, 2023
    Applicant: Kioxia Corporation
    Inventors: Hikari Tajima, Masayuki Kitamura, Seiichi Omoto
  • Patent number: 11705404
    Abstract: In one embodiment, a semiconductor device includes a substrate, and a plurality of insulating layers provided on the substrate. The device further includes a plurality of electrode layers provided on the substrate alternately with the plurality of insulating layers and including metal atoms and impurity atoms different from the metal atoms, lattice spacing between the metal atoms in the electrode layers being greater than lattice spacing between the metal atoms in an elemental substance of the metal atoms.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: July 18, 2023
    Assignee: Kioxia Corporation
    Inventors: Satoshi Wakatsuki, Masayuki Kitamura, Atsuko Sakata
  • Patent number: 11699731
    Abstract: According to at least one embodiment, a semiconductor device includes a plurality of insulating films adjacent to each other. A conductive film is provided between the plurality of insulating films. The conductive film includes molybdenum having a grain diameter substantially the same as a distance from an upper surface to a lower surface of the conductive film.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: July 11, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Takayuki Beppu, Masayuki Kitamura, Hiroshi Toyoda, Katsuaki Natori
  • Patent number: 11658110
    Abstract: A semiconductor device includes an interconnect including (i) a first layer, and (ii) a second layer provided on the first layer and including copper. The device also includes a plug provided on the interconnect and including (a) a third layer including titanium and nitrogen, and (b) a fourth layer provided on the third layer and including tungsten. A concentration of chlorine in the third layer is less than or equal to 5.0×1021 atoms/cm3, and a concentration of oxygen at the interface between the third layer and the fourth layer is less than or equal to 5.0×1021 atoms/cm3.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: May 23, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Masayuki Kitamura, Atsushi Kato, Hiroaki Matsuda
  • Publication number: 20230088700
    Abstract: A semiconductor device that can have an improved data retention characteristic is provided. A semiconductor device includes a stacked body and a memory pillar formed in a memory hole of the stacked body. The memory pillar has a structure in which a semiconductor portion 61b, a tunnel insulating film 62a, and a charge storage layer 62b are sequentially stacked. A block insulating film 53 is provided between the charge storage layer 62b and a conductive layer 52. The conductive layer 52 contains molybdenum. The block insulating film 53 includes a silicon oxide film 53a and an aluminum oxide film 53b. A region from the conductive layer 52 to the aluminum oxide film 53b contains chlorine, which prevents OH diffusion. The concentration of chlorine at a second portion closer to the aluminum oxide film 53b than a first portion in the conductive layer 52 is higher than the concentration of impurities at the first portion in the conductive layer.
    Type: Application
    Filed: December 10, 2021
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Tomotaka ARIGA, Masayuki KITAMURA, Hiroshi TOYODA
  • Publication number: 20230093431
    Abstract: A semiconductor device according to an embodiment includes an oxide film containing first element and a conductive film provided to be in contact with the oxide film, containing metal element and oxygen element, and having conductivity. A range of a volume density of the oxygen element in the conductive film is different between cases where the metal element are tungsten (W), molybdenum (Mo), titanium (Ti), chromium (Cr), vanadium (V), iron (Fe), copper (Cu), tantalum (Ta), or niobium (Nb).
    Type: Application
    Filed: November 30, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventor: Masayuki KITAMURA
  • Publication number: 20230085314
    Abstract: A semiconductor device includes a substrate comprising a first interconnection configured to provide a first reference voltage, a second interconnection configured to provide a second reference voltage different from the first reference voltage, and at least one interconnection layer. The first interconnection comprises a plurality of first interconnection components that are provided in the interconnection layer. The second interconnection comprises a plurality of second interconnection components that are provided in the interconnection layer. The plurality of first interconnection components and the plurality of second interconnection components are alternately arranged in a first direction parallel to the interconnection layer.
    Type: Application
    Filed: February 28, 2022
    Publication date: March 16, 2023
    Applicant: Kioxia Corporation
    Inventor: Masayuki KITAMURA
  • Publication number: 20220319842
    Abstract: A substrate processing apparatus includes a chamber to accommodate a substrate. The apparatus includes a stage to support the substrate in the chamber. The apparatus includes an electrode disposed above the stage and containing aluminum. The electrode generates plasma from gas supplied into the chamber to form a first film on the substrate by the plasma. The apparatus further includes a second film formed on a surface of the electrode and containing aluminum and fluorine or containing aluminum and oxygen.
    Type: Application
    Filed: June 20, 2022
    Publication date: October 6, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Yuya MATSUBARA, Masayuki KITAMURA, Atsuko SAKATA
  • Publication number: 20220270940
    Abstract: An abnormality detection method includes: supplying a gas controlled to a selected rate to a gas supply pipe via the gas pipe connected to the gas supply pipe, thereby introducing the gas into a reaction region of a processing container provided in a processing apparatus from a gas hole of the gas supply pipe; measuring a pressure inside the gas pipe by a pressure gauge attached to the gas pipe; and detecting an abnormality of at least one of the gas supply pipe and the gas pipe based on the pressure measured at the measuring.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 25, 2022
    Inventors: Shingo HISHIYA, Nobutoshi TERASAWA, Fumiaki NAGAI, Kazuaki SASAKI, Hiroaki KIKUCHI, Masayuki KITAMURA, Kazuo YABE, Motoshi FUKUDOME, Tatsuya MIYAHARA, Eiji KIKAMA, Yuki TANABE, Tomoyuki NAGATA
  • Patent number: 11393675
    Abstract: A substrate processing apparatus includes a chamber to accommodate a substrate. The apparatus includes a stage to support the substrate in the chamber. The apparatus includes an electrode disposed above the stage and containing aluminum. The electrode generates plasma from gas supplied into the chamber to form a first film on the substrate by the plasma. The apparatus further includes a second film formed on a surface of the electrode and containing aluminum and fluorine or containing aluminum and oxygen.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: July 19, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yuya Matsubara, Masayuki Kitamura, Atsuko Sakata