Patents by Inventor Masayuki Koga
Masayuki Koga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060038948Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.Type: ApplicationFiled: October 12, 2005Publication date: February 23, 2006Inventors: Ryuji Nishikawa, Yasushi Miyajima, Masayuki Koga, Mitsugu Kobayashi
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Patent number: 6989266Abstract: A cement paste containing microbial cells which has a sustained effect and an excellent function of purifying water. This cement paste contains a mixture of Bacillus subtilis, Bacillus thuringiensis and Bacillus sphaericus cells at a mixing ratio by mass of 0.1 to 50:0.1 to 50:0.1 to 50.Type: GrantFiled: December 10, 2001Date of Patent: January 24, 2006Assignee: Koyoh Corporation, Ltd.Inventors: Masayuki Koga, Yoko Koga
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Publication number: 20050029187Abstract: A cement paste containing microbial cells which has a sustained effect and an excellent function of purifying water. This cement paste contains a mixture of Bacillus subtilis, Bacillus thuringiensis and Bacillus sphaericus cells at a mixing ratio by mass of 0.1 to 50:0.1 to 50:0.1 to 50.Type: ApplicationFiled: December 10, 2001Publication date: February 10, 2005Inventors: Masayuki Koga, Yoko Koga
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Publication number: 20050017929Abstract: When a switching TFT is switched on, a data voltage on a data line is stored in a storage capacitor as a gate voltage of a driver TFT. In this state, a voltage on a pulse drive line is caused to fall. AMOS type capacity element having a second electrode connected to a reference voltage is connected to a gate of the driver TFT. The MOS type capacity element is in an ON state before a fall of the pulse drive line and becomes an OFF state during the fall, and a capacitance changes at the switching of ON state to the OFF state. Therefore, the slope of fall of the gate voltage changes, and the gate voltage after the fall on the pulse drive line can be corrected corresponding to the variation in the threshold values among driver TFTs.Type: ApplicationFiled: May 28, 2004Publication date: January 27, 2005Inventors: Keiichi Sano, Koji Marumo, Masayuki Koga, Kenya Uesugi, Michiru Senda, Kuni Yamamura
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Patent number: 6841827Abstract: Information is not written in through channel dope, but through the difference of ions implanted into the impurity region of a semiconductor layer. Each memory element has a pair of the thin film transistors. The memory element with “1” written on it and the memory element with “0” written on it are differentiated based on whether the thin film transistors of the pair belongs to the same conductivity type or different conductivity types. Also, when the write-in impurity region is formed adjacent the impurity region, it is possible to differentiate the memory elements based on whether a diode connected to the thin film transistor in series is formed or not. Since these elements can be produced without the ion-implantation through the gate electrode, it is possible to build a mask ROM on the glass substrate. Also, it is possible to differentiate the memory elements based on whether wiring contact holes are formed in the thin film transistor or not.Type: GrantFiled: August 2, 2002Date of Patent: January 11, 2005Assignees: Sanyo Electric Co., Ltd., Tottori Sanyo Electric Co., Ltd.Inventor: Masayuki Koga
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Publication number: 20040027315Abstract: A display allowing further miniaturization when including a plurality of display panels is obtained. This display comprises a first display panel formed on a substrate and a second display panel formed on the same substrate on a region different from that formed with the first display panel. Thus, the display can be further miniaturized as compared with that having a first display panel and a second display panel formed on different substrates.Type: ApplicationFiled: August 8, 2003Publication date: February 12, 2004Applicant: SANYO ELECTRIC CO., LTD.Inventors: Michiru Senda, Masayuki Koga, Masahiro Okuyama, Ryoichi Yokoyama, Isao Akima
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Publication number: 20030038322Abstract: Information is not written in through channel dope, but through the difference of ions implanted into the impurity region of a semiconductor layer. Each memory element has a pair of the thin film transistors. The memory element with “1” written on it and the memory element with “0” written on it are differentiated based on whether the thin film transistors of the pair belongs to the same conductivity type or different conductivity types. Also, when the write-in impurity region is formed adjacent the impurity region, it is possible to differentiate the memory elements based on whether a diode connected to the thin film transistor in series is formed or not. Since these elements can be produced without the ion-implantation through the gate electrode, it is possible to build a mask ROM on the glass substrate. Also, it is possible to differentiate the memory elements based on whether wiring contact holes are formed in the thin film transistor or not.Type: ApplicationFiled: August 2, 2002Publication date: February 27, 2003Applicant: Sanyo Electric Company, Ltd.Inventor: Masayuki Koga
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Patent number: 6521474Abstract: On an insulating substrate, there are formed a first gate electrode, a gate insulating film, a semiconductor film, and an interlayer insulating film. Above the interlayer insulating film, a TFT is formed having a second gate electrode connected to the first gate electrode. Then, a photosensitive resin is formed over the entire surface of the extant layers. Subsequently, first exposure is applied using a first mask, and second exposure is then applied using a second mask with a larger amount of light than used for the first exposure. The second mask has an opening at a position corresponding to a source. Thereafter, the photosensitive resin film is developed thereby forming a contact hole and a concave.Type: GrantFiled: October 12, 2001Date of Patent: February 18, 2003Assignee: Sanyo Electric Co., Ltd.Inventors: Kazuto Noritake, Toshifumi Yamaji, Ryuji Nishikawa, Yasushi Miyajima, Masayuki Koga, Mitsugu Kobayashi
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Patent number: 6470015Abstract: A transmitting sequence changing/restoring unit receives, from an ATM control unit, ATM cells stored with the transmitting target information in a segmented state. The transmitting sequence changing/restoring unit groups the cells of this cell string by fours, adds the synchronous cell to the head each group, and changes the sequence thereof. The respective cells are transferred in the changed sequence in sections ranging from the transmitting sequence changing/restoring unit of the transmitting-side ATM node to the unit of the receiving-side ATM node. Accordingly, even if the ATM cell string is intercepted by the third part in this section, this third party cannot reproduce the original transmitting target information.Type: GrantFiled: September 15, 1998Date of Patent: October 22, 2002Assignee: Fujitsu LimitedInventors: Masayuki Koga, Akihisa Erami
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Publication number: 20020076845Abstract: On an insulating substrate, there are formed a first gate electrode, a gate insulating film, a semiconductor film, and an interlayer insulating film. Above the interlayer insulating film, a TFT is formed having a second gate electrode connected to the first gate electrode. Then, a photosensitive resin is formed over the entire surface of the extant layers. Subsequently, first exposure is applied using a first mask, and second exposure is then applied using a second mask with a larger amount of light than used for the first exposure. The second mask has an opening at a position corresponding to a source. Thereafter, the photosensitive resin film is developed thereby forming a contact hole and a concave.Type: ApplicationFiled: October 12, 2001Publication date: June 20, 2002Inventors: Kazuto Noritake, Toshifumi Yamaji, Ryuji Nishikawa, Yasushi Miyajima, Masayuki Koga, Mitsugu Kobayashi
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Patent number: 6355940Abstract: Two charge transfer passages of one TFT, which comprise two areas with island layers of p-Si intersecting at right angles and running from respective drain areas ND, PD to source areas NS, PS through an LD area LD and a channel area CH, are arranged non-parallel to each other. Even if a defective crystallization area R, which is caused due to uneven intensity in an irradiated area in laser annealing for forming p-Si of a p-Si TFT LCD, passes across the TFT area, and either of the transfer passages is defective, the remaining one operates normally, and the component characteristics are maintained as desired.Type: GrantFiled: September 4, 1998Date of Patent: March 12, 2002Assignee: Sanyo Electric Co., Ltd.Inventors: Masayuki Koga, Katsuya Kihara
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Publication number: 20010052598Abstract: Two charge transfer passages of one TFT, which comprise two areas with island layers of p-Si intersecting at right angles and running from respective drain areas ND, PD to source areas NS, PS through an LD area LD and a channel area CH, are arranged non-parallel to each other. Even if a defective crystallization area R, which is caused due to uneven intensity in an irradiated area in laser annealing for forming p-Si of a p-Si TFT LCD, passes across the TFT area, and either of the transfer passages is defective, the remaining one operates normally, and the component characteristics are maintained as desired.Type: ApplicationFiled: August 8, 2001Publication date: December 20, 2001Applicant: Sanyo Electric Co., Ltd.Inventors: Masayuki Koga, Katsuya Kihara
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Publication number: 20010045930Abstract: When a gate voltage having a rectangular-shaped pulse is supplied, the voltage of a pixel electrode is pulled down and fluctuated by a fall of the gate voltage due to a parasitic capacitor formed between a gate line and the pixel electrode, i.e. a so-called drop voltage is generated. As the drop voltage depends on a time constant of a change in the gate voltage, it can be diminished by smoothing the falling edge of the gate voltage. This is achieved by, for example, providing a current discharging transistor of a gate driver 8 with a small channel width to decrease the maximum current value. By utilizing such a gate voltage, a liquid crystal display device with a small drop voltage can be provided, even when the capacitance of the parasitic capacitor is great.Type: ApplicationFiled: March 28, 2001Publication date: November 29, 2001Inventors: Yasushi Miyajima, Masayuki Koga
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Patent number: 6226681Abstract: A communication terminal in an information offering system used through an ATM network providing, for example, multicast connections. The information offering system is equipped with an information offering unit and a network unit accommodating a plurality of communication terminals including the communication terminal through lines and made to offer desired information transmitted from the information offering unit through a virtual path and virtual channel set peculiarly to the information to the communication terminal. The communication terminal comprises an identifying information inserting section for inserting information for identifying one of the communication terminals being the sender as terminal identifying information into data to be transmitted to the information offering unit side and a transmitting section for transmitting the data undergoing the insertion of the terminal identifying information in the identifying information inserting section through the virtual path and the virtual channel.Type: GrantFiled: November 12, 1997Date of Patent: May 1, 2001Assignee: Fujitsu LimitedInventors: Masayuki Koga, Shinichi Ishigaki
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Patent number: 6157228Abstract: A data line driving circuit comprises a shift register for sequentially generating sampling pulses according to a clock pulse, a buffer connected to each stage of the shift register, and a sampling switch for sampling a data signal according to the sampling pulse outputted from the buffer. The buffer is provided with a logic gate for synchronizing the output of the shift register with the clock signal.Type: GrantFiled: September 10, 1998Date of Patent: December 5, 2000Assignee: Sanyo Electric, Co., Ltd.Inventors: Ryoichi Yokoyama, Masayuki Koga
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Patent number: 5889504Abstract: A shift register circuit includes a plurality of shift register blocks and a plurality of connecting sections that belong to a plurality of signal shifting systems. Each of the shift register blocks includes a plurality of shift register groups, each of which belongs to the plurality of signal shifting systems. Each of the connecting sections is provided to mutually connect the shift register groups belonging to the associated signal shifting system. The plurality of shift register blocks and the plurality of connecting sections are arranged in a line in the shift register circuit. Further, the plurality of connecting sections are separated by at least two connecting section groups in that line arrangement with at least one of the shift register blocks located between the connecting section groups.Type: GrantFiled: November 29, 1995Date of Patent: March 30, 1999Assignee: Sanyo Electric Co., Ltd.Inventors: Katsuya Kihara, Atsushi Wada, Masayuki Koga
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Patent number: 5826118Abstract: A camera including a camera body, a lens barrel, a power supply source to supply power to circuits of the camera, and a main switch to switch the power supply source between a power supplied status and power-not-supplied status. The lens barrel has a first position which is where the lens barrel is completely retracted within the camera body, a second position which is where the lens barrel is set when the main switch has gone into the power supplied status, and a reference position which is for positional control of the lens barrel with respect to the camera body. The reference position is between the first position and the second position of the lens barrel. If a new battery is inserted into the camera, the lens barrel is not moved, thereby preventing a camera holder from dropping the camera.Type: GrantFiled: March 5, 1997Date of Patent: October 20, 1998Assignee: Nikon CorporationInventors: Masayuki Koga, Toru Kosaka
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Patent number: 5781171Abstract: A shift register has four systems of shift registers for bidirectional scans and normal/redundant lines. The respective systems of shift registers are divided into blocks, so that transmission circuits are provided therebetween. The transmission circuits form switching circuits through transfer gates. The transmission circuits receive output signals from both of the shift registers for the normal/redundant lines, and output only normal output signals to next stage shift registers in accordance with control signals.Type: GrantFiled: May 30, 1995Date of Patent: July 14, 1998Assignee: Sanyo Electric Co., Ltd.Inventors: Katsuya Kihara, Masayuki Koga
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Patent number: 5734940Abstract: A camera adapted to obtain a correct exposure, even with a film having a film sensitivity outside an automatic setting range of the camera. A film sensitivity outside the automatic setting range of the camera is stored, or canceled by manipulating a manipulation member in a manipulation order that differs from that used during photography. Further, two manipulation members may be used in a combined manipulation order that differs from that used during photography. For example, a zoom up and a zoom down switch may be used in conjunction with a main switch to set a higher and a lower, respectively, film sensitivity. Additionally, the setting may be canceled by manipulating the zoom up and zoom down switches simultaneously. A display device which normally displays photographic information regarding the camera, temporarily displays the manually set film sensitivity.Type: GrantFiled: January 11, 1996Date of Patent: March 31, 1998Assignee: Nikon CorporationInventors: Yukikazu Iwane, Yoshikazu Iida, Kiyosada Machida, Masayuki Koga