Patents by Inventor Masayuki Kyoui

Masayuki Kyoui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5939789
    Abstract: A multilayer substrate which is fabricated by laminating a plurality of substrates, each comprising an insulation film, a plurality of via holes which pass through the upper surface to the lower surface of the insulation film, a wiring which is provided on the upper surface of the insulation film and the upper surface of the via holes and electrically connected with the via holes, a bonding member which is provided on the lower surfaces of the via holes and electrically connected with the via holes, and a bonding layer which is provided on the upper surface of the insulation film where the wiring is formed and the method of fabrication thereof whereby large costs reduction and high density effect can be obtained.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: August 17, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Michifumi Kawai, Ryohei Satoh, Osamu Yamada, Eiji Matsuda, Masakazu Ishino, Takashi Inoue, Hideo Sotokawa, Masayuki Kyoui
  • Patent number: 5496433
    Abstract: A hot press for producing a multilayered substrate including vertically opposing upper and lower bolsters relatively movable toward each other to press multilayered substrate blanks and to cool the plates after the bonding. A sealing arrangement includes a cylinder and encloses the upper and lower bolsters so as to define a hermetically sealed space, with an evacuating arrangement reducing the pressure inside the hermetically sealed space during heating and pressing in which a bonding agent in the multilayered substrate blanks is softened. A high-pressure gas supplying arrangement supplies a pressurizing gas into the hermetically sealed space so as to impart the bonding pressure.
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: March 5, 1996
    Assignee: Hitachi Techno Engineering Co., Ltd.
    Inventors: Akimi Miyashita, Mutsumasa Fujii, Kiyonori Kogawa, Masayuki Kyoui
  • Patent number: 5480048
    Abstract: A multilayer wiring board fabricating method and a multilayer wiring board fabricated with use of the method that a solvent-free fluid polymer precursor is put on a wiring layer of a base substrate, and space among the wirings is exhausted and is filled with the precursor, and the precursor is hardened under a hydrostatic pressure and then the next wiring layer is formed before the above process is repeated one or more times. The multilayer wiring board fabricating method is excellent in the mass productivity and low cost and in that the wiring can be made highly dense with the substrate having vertical via conductors for connection among the conductor layers.
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: January 2, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Kitamura, Hisashi Sugiyama, Yoshihide Yamaguchi, Masayuki Kyoui, Hideyasu Murooka, Ryoji Iwamura, Makio Watanabe