Patents by Inventor Masayuki OKUSHI

Masayuki OKUSHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9972560
    Abstract: A lead frame includes a first lead frame including a first lead; a second lead frame including a second lead, the second lead frame being stacked on the first lead frame so that a space is formed between the first lead frame and the second lead frame, and the second lead being bonded to the first lead; and a resin portion provided in the space formed between the first lead frame and the second lead frame, wherein each of the first lead and the second lead includes an embedded portion embedded in the resin portion, and a protruding portion protruded from the resin portion, and wherein the embedded portion of the first lead and the embedded portion of the second lead are bonded in the resin portion.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: May 15, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tetsuichiro Kasahara, Hideki Matsuzawa, Masayuki Okushi, Naoya Sakai
  • Publication number: 20170207148
    Abstract: A lead frame includes a first lead frame including a first lead; a second lead frame including a second lead, the second lead frame being stacked on the first lead frame so that a space is formed between the first lead frame and the second lead frame, and the second lead being bonded to the first lead; and a resin portion provided in the space formed between the first lead frame and the second lead frame, wherein each of the first lead and the second lead includes an embedded portion embedded in the resin portion, and a protruding portion protruded from the resin portion, and wherein the embedded portion of the first lead and the embedded portion of the second lead are bonded in the resin portion.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 20, 2017
    Inventors: Tetsuichiro KASAHARA, Hideki MATSUZAWA, Masayuki OKUSHI, Naoya SAKAI
  • Patent number: 9698084
    Abstract: A semiconductor device includes a lead frame having terminals, a semiconductor chip electrically coupled to the terminals, and a resin part configured to encapsulate the semiconductor chip such as to expose part of the terminals, wherein a given one of the terminals includes a first lead and a second lead welded together such that an upper face of the first lead is placed against a lower face of the second lead, wherein the lower face of the second lead extends further than the upper face of the first lead toward the semiconductor chip in a longitudinal direction of the terminal, and also extends further sideways than the upper face of the first lead in a transverse direction of the terminal, and wherein an area of the lower face of the second lead is covered with the resin part, the area extending further than the upper face of the first lead.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: July 4, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tetsuichiro Kasahara, Naoya Sakai, Hideki Kobayashi, Masayuki Okushi
  • Publication number: 20160181187
    Abstract: A semiconductor device includes a lead frame having terminals, a semiconductor chip electrically coupled to the terminals, and a resin part configured to encapsulate the semiconductor chip such as to expose part of the terminals, wherein a given one of the terminals includes a first lead and a second lead welded together such that an upper face of the first lead is placed against a lower face of the second lead, wherein the lower face of the second lead extends further than the upper face of the first lead toward the semiconductor chip in a longitudinal direction of the terminal, and also extends further sideways than the upper face of the first lead in a transverse direction of the terminal, and wherein an area of the lower face of the second lead is covered with the resin part, the area extending further than the upper face of the first lead.
    Type: Application
    Filed: December 1, 2015
    Publication date: June 23, 2016
    Inventors: Tetsuichiro KASAHARA, Naoya SAKAI, Hideki KOBAYASHI, Masayuki OKUSHI
  • Patent number: 8581379
    Abstract: A lead frame for a resin-seal type semiconductor device, which includes a semiconductor element having an electrode, a bonding wire connected to the electrode of the semiconductor element, and a sealing resin covering and sealing the semiconductor element and the bonding wire. The lead frame includes a substrate frame, a four-layer plating, and a three-layer plating. The substrate frame include leads, a connection region, which is sealed by the sealing resin and connected to the bonding wire, and an exposed region, which is not sealed by the sealing resin. A four-layer plating is applied to a portion of the substrate frame that is to be connected to the bonding wire and sealed by the sealing resin. A three-layer plating is applied to an exposed region of the substrate frame that is exposed from the sealing resin.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: November 12, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Muneaki Kure, Takashi Yoshie, Masayuki Okushi
  • Publication number: 20120248591
    Abstract: A lead frame for a resin-seal type semiconductor device, which includes a semiconductor element having an electrode, a bonding wire connected to the electrode of the semiconductor element, and a sealing resin covering and sealing the semiconductor element and the bonding wire. The lead frame includes a substrate frame, a four-layer plating, and a three-layer plating. The substrate frame include leads, a connection region, which is sealed by the sealing resin and connected to the bonding wire, and an exposed region, which is not sealed by the sealing resin. A four-layer plating is applied to a portion of the substrate frame that is to be connected to the bonding wire and sealed by the sealing resin. A three-layer plating is applied to an exposed region of the substrate frame that is exposed from the sealing resin.
    Type: Application
    Filed: March 15, 2012
    Publication date: October 4, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES, CO., LTD.
    Inventors: Muneaki KURE, Takashi YOSHIE, Masayuki OKUSHI