Abstract: In an embodiment, an apparatus includes a first digital beamformer (DBF) associated with a first subset of antennas of a phased array antenna, the first DBF including a transmit section associated with transmission of a first signal at a first frequency in a transmit mode and a receive section associated with receiving of a second signal at a second frequency in a receive mode, the second frequency being different from the first frequency. The apparatus includes a second DBF associated with a second subset of antennas of the phased array antenna. The first and second DBFs are configured to receive a local oscillator signal having the first frequency from a common local oscillator in the transmit mode and receive the local oscillator signal having the second frequency from the common local oscillator in the receive mode.

Abstract: In an embodiment, a receiver included in a communications system is configured to receive a radio frequency (RF) signal from a phased array antenna, the RF signal comprising at least a portion of a plurality of data beams included in a single channel, generate a plurality of channel signals based on the RF signal. Generating the plurality of channel signals includes separating the RF signal into a plurality of channels in which each channel of the plurality of channels includes at least a portion of a respective subset of the plurality of data beams. The receiver is further configured to decode each data beam of the plurality of channel signals with a respective phase and a respective time delay. The receiver is further configured to output the plurality of data beams of the plurality of channels.

Abstract: In an embodiment, an apparatus includes one or more electrical components. The one or more electrical components are configured to encode each data beam of a first plurality of data beams of a first channel to generate an encoded first plurality of data beams. The one or more electrical components are configured to encode each data beam of a second plurality of data beams of a second channel to generate an encoded second plurality of data beams. The one or more electrical components are configured to generate a combined channel comprising an aggregation of at least a portion of the encoded first plurality of data beams and at least a portion of the encoded second plurality of data beams.

Abstract: In an embodiment, a device is included in a communications system, the device including a plurality of antenna elements configured in a phased array antenna; a plurality of integrated circuit (IC) chips, wherein each IC chip of the plurality of IC chips is associated with a respective subset of antenna elements of the plurality of antenna elements, and wherein, for each IC chip of the plurality of IC chips, the associated subset of antenna elements is used for transmitting and receiving radio frequency (RF) signals by the IC chip; and a local oscillator configured to generate a common local oscillator signal and provide the common local oscillator signal to each IC chip of the plurality of IC chips.

Abstract: In an embodiment, an apparatus includes a first baseband section to receive a calibration signal; a first radio frequency (RF) section configured to generate a RF calibration signal based on modulating the calibration signal. The calibration signal comprises an orthogonal code based signal. The apparatus includes a second RF section to receive the RF calibration signal and generate a received calibration signal based on demodulating the RF calibration signal; a calibration section; a first antenna electrically coupled to the first RF section and configured to transmit the RF calibration signal; and a second antenna electrically coupled to the second RF section and configured to receive the RF calibration signal. The calibration section is configured to determine one or more of gain, baseband delay, or RF delay to calibrate the first RF section; and the second antenna is switchable between receiving the RF calibration signal and transmitting an encoded data signal.

Abstract: In an embodiment, an apparatus includes one or more timing components configured to generate a reference time signal based on a timing signal and a reference clock signal. The apparatus includes phase lock loop (PLL) configured to generate a synchronized output clock signal based on the reference clock signal and the reference time signal.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, an apparatus includes a digital beamforming section. The digital beamforming section is configured to encode each data beam of a first plurality of data beams of a first channel with a first plurality of respective time delays and phases to generate an encoded first plurality of data beams and encode each data beam of a second plurality of data beams of a second channel with a second plurality of respective time delays and phases to generate an encoded second plurality of data beams. The second plurality of data beams is different from the first plurality of data beams. The apparatus includes a channel combiner, electrically coupled to the digital beamforming section, and configured to generate a combined channel comprising an aggregation of at least a portion of the encoded first plurality of data beams and at least a portion of the encoded second plurality of data beams.

Abstract: In an embodiment, an apparatus includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on modulating the calibration signal. The calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, the receive section includes a second RF section and a calibration section, the second RF section is configured to generate a received calibration signal based on the RF calibration signal, the received calibration signal and a reference signal associated with the RF calibration signal comprise inputs to the calibration section and the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

Abstract: In an embodiment, an apparatus includes an integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal. The IC chips is configured to a reference time signal based on the timing signal and the reference clock signal. The IC chip includes a phase lock loop (PLL). The PLL is synchronized based on the reference time signal.

Abstract: In an embodiment, an apparatus includes a digital beamforming section. The digital beamforming section is configured to encode each data beam of a first plurality of data beams of a first channel with a first plurality of respective time delays and phases to generate an encoded first plurality of data beams and encode each data beam of a second plurality of data beams of a second channel with a second plurality of respective time delays and phases to generate an encoded second plurality of data beams. The second plurality of data beams is different from the first plurality of data beams. The apparatus includes a channel combiner, electrically coupled to the digital beamforming section, and configured to generate a combined channel comprising an aggregation of at least a portion of the encoded first plurality of data beams and at least a portion of the encoded second plurality of data beams.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, an apparatus includes a first plurality of digital beamformers associated with a first channel, the first plurality of digital beamformers configured to encode each data beam of a first plurality of data beams of the first channel to generate an encoded first plurality of data beams; a second plurality of digital beamformers associated with a second channel different from the first channel, the second plurality of digital beamformers configured to encode each data beam of a second plurality of data beams of the second channel to generate an encoded second plurality of data beams; and a channel combiner, electrically coupled to the first and second plurality of digital beamformers, and configured to generate a combined channel comprising an aggregation of at least a portion of the encoded first plurality of data beams and at least a portion of the encoded second plurality of data beams.

Abstract: In an embodiment, an apparatus includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on modulating the calibration signal. The calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, the receive section includes a second RF section and a calibration section, the second RF section is configured to generate a received calibration signal based on the RF calibration signal, the received calibration signal and a reference signal associated with the RF calibration signal comprise inputs to the calibration section and the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

Abstract: In an embodiment, an apparatus includes an integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal. The IC chips is configured to a reference time signal based on the timing signal and the reference clock signal. The IC chip includes a phase lock loop (PLL). The PLL is synchronized based on the reference time signal.

Abstract: In an embodiment, an apparatus included in a communications system includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on the calibration signal, and wherein the calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, wherein the receive section includes a second RF section and a calibration section, wherein the second RF section is configured to generate a received calibration signal based on the RF calibration signal, and wherein the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

Abstract: In an embodiment, an apparatus includes a first integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal; and a second IC chip configured to receive the timing signal and the reference clock signal. The first and second IC chips are configured to generate respective first and second reference time signals based on the timing signal and the reference clock signal. The first and second IC chips include a respective first phase lock loop (PLL) and second PLL. The first PLL and the second PLL are synchronized to each other based on the first reference time signal and the second reference time signal.

Abstract: In an embodiment, an apparatus includes a first integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal; and a second IC chip configured to receive the timing signal and the reference clock signal. The first and second IC chips are configured to generate respective first and second reference time signals based on the timing signal and the reference clock signal. The first and second IC chips include a respective first phase lock loop (PLL) and second PLL. The first PLL and the second PLL are synchronized to each other based on the first reference time signal and the second reference time signal.

Abstract: In an embodiment, an apparatus includes a first integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal; a second IC chip configured to receive the timing signal from the first IC chip and the reference clock signal; and a third IC chip configured to receive the timing signal from the second IC chip and the reference clock signal. The second IC chip is electrically coupled between the first and third IC chips. The first, second, and third IC chips include respectively first, second, and third phase lock loop (PLL). The first, second, and third IC chips are configured to generate respective first, second, and third reference time signals based on the timing signal and the reference clock signal. The first, second, and third PLLs are synchronized to each other based on the respective first, second, and third reference time signals.