Patents by Inventor Massimo Fischetti

Massimo Fischetti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080044966
    Abstract: The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a <110> crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing <110> layer; and creating a biaxial strain in the silicon-containing <110> layer.
    Type: Application
    Filed: October 25, 2007
    Publication date: February 21, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Victor Chan, Massimo Fischetti, John Hergenrother, Meikei Ieong, Rajesh Rengarajan, Alexander Reznicek, Paul Solomon, Chun-yung Sung, Min Yang
  • Publication number: 20080044987
    Abstract: The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a <110> crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing <110> layer; and creating a biaxial strain in the silicon-containing <110> layer.
    Type: Application
    Filed: October 25, 2007
    Publication date: February 21, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Victor Chan, Massimo Fischetti, John Hergenrother, Meikei Ieong, Rajesh Rengarajan, Alexander Reznicek, Paul Solomon, Chun-yung Sung, Min Yang
  • Publication number: 20070158739
    Abstract: A semiconductor (e.g., complementary metal oxide semiconductor (CMOS)) structure formed on a (110) substrate that has improved performance, in terms of mobility enhancement is provided. In accordance with the present invention, the inventive structure includes at least one of a single tensile stressed liner, a compressively stressed shallow trench isolation (STI) region, or a tensile stressed embedded well, which is used in conjunction with the (110) substrate to improve carrier mobility of both nFETs and pFETs. The present invention also relates to a method of providing such structures.
    Type: Application
    Filed: January 6, 2006
    Publication date: July 12, 2007
    Applicant: International Business Machines Corporation
    Inventors: Massimo Fischetti, Qiqing Ouyang
  • Publication number: 20070099367
    Abstract: The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a <110> crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing <110> layer; and creating a biaxial strain in the silicon-containing <110> layer.
    Type: Application
    Filed: December 18, 2006
    Publication date: May 3, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Victor Chan, Massimo Fischetti, John Hergenrother, Meikei Ieong, Rajesh Rengarajan, Alexander Reznicek, Paul Solomon, Chun-yung Sung, Min Yang
  • Publication number: 20050145837
    Abstract: The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a <110> crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing <110> layer; and creating a biaxial strain in the silicon-containing <110> layer.
    Type: Application
    Filed: November 3, 2004
    Publication date: July 7, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Victor Chan, Massimo Fischetti, John Hergenrother, Meikei Ieong, Rajesh Rengarajan, Alexander Reznicek, Paul Solomon, Chun-yung Sung, Min Yang