Abstract: A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric layer and the plurality of mask openings include a plurality of first mask openings and a plurality of second mask openings, each of the plurality of first mask openings being greater in size than each of the plurality of second mask openings. The method further comprises reducing the size of the plurality of second mask openings such that each of the second mask openings is substantially closed and removing portions of the dielectric layer through the plurality of first mask openings to provide openings extending through the dielectric layer to the layer.

Abstract: A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, forming a main mask over the dielectric layer, the main mask comprising a plurality of main mask openings arranged in a regular pattern extending over the dielectric layer, using a selector mask to select some of the plurality of main mask openings and removing portions of the dielectric layer through the selected some of the plurality of main mask openings to provide openings extending through the dielectric layer to the layer.

Abstract: A method of manufacturing a semiconductor device on a substrate. The method may include forming a non-volatile memory in a memory area of the substrate. The forming non-volatile memory on a substrate may include formation in the memory area of a floating gate structure and of a control gate structure which is in a stacked configuration with the floating gate structure. One or more gate material layer may be formed in a logic area of the substrate. After forming the control gate structure and the gate material layer, a filling material layer may be deposited over the logic area and the memory area. The filling material layer may be partially removed by reducing the thickness of the filling material in the logic area and the memory area, at least until a top surface of the one or more gate material layer is exposed. Logic devices may be formed in the logic area, the formation may include forming a logic gate structure from the gate material layer.

Abstract: A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric layer and the plurality of mask openings include a plurality of first mask openings and a plurality of second mask openings, each of the plurality of first mask openings being greater in size than each of the plurality of second mask openings. The method further comprises reducing the size of the plurality of second mask openings such that each of the second mask openings is substantially closed and removing portions of the dielectric layer through the plurality of first mask openings to provide openings extending through the dielectric layer to the layer.

Abstract: A method of manufacturing a semiconductor device on a substrate. The method may include forming a non-volatile memory in a memory area of the substrate. The forming non-volatile memory on a substrate may include formation in the memory area of a floating gate structure and of a control gate structure which is in a stacked configuration with the floating gate structure. One or more gate material layer may be formed in a logic area of the substrate. After forming the control gate structure and the gate material layer, a filling material layer may be deposited over the logic area and the memory area. The filling material layer may be partially removed by reducing the thickness of the filling material in the logic area and the memory area, at least until a top surface of the one or more gate material layer is exposed. Logic devices may be formed in the logic area, the formation may include forming a logic gate structure from the gate material layer.

Abstract: A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, forming a main mask over the dielectric layer, the main mask comprising a plurality of main mask openings arranged in a regular pattern extending over the dielectric layer, using a selector mask to select some of the plurality of main mask openings and removing portions of the dielectric layer through the selected some of the plurality of main mask openings to provide openings extending through the dielectric layer to the layer.

Abstract: A method includes forming an insulating layer over a substrate, forming a masking layer over the insulating layer, forming a developable bottom anti-reflective coating (BARC) over the masking layer, forming a first photo resist layer over the developable BARC, exposing and developing portions of both the first photo resist layer and the developable BARC to form a first set of openings in the developable BARC, forming a second photo resist layer over the first set of openings and the developable BARC, exposing and developing portions of both the second photo resist layer and the developable BARC to form a second set of openings in the developable BARC, and extending each opening in the first and second set of openings through the masking layer and the insulating layer.