Patents by Inventor Matan Vax

Matan Vax has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10733345
    Abstract: A method for automatically finding a verification test of a plurality of verification tests that were executed in a verification process of a design under test (DUT) that satisfies a criterion, may include using a processor, obtaining from a user a criterion that relates to one or more test actions; using a processor, obtaining a log with logged execution data that includes start and end times for each action of each of the tests of the plurality of verification tests during an execution run of that test; and for each test of the plurality of verification tests, using a processor, determining from the logged data whether that test satisfies the obtained criterion, and if a test of the plurality of verification tests was determined to satisfy the obtained criterion, using a processor, executing that test on the DUT.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: August 4, 2020
    Assignee: Cadence Design Systems, Inc.
    Inventors: Meir Ovadia, Matan Vax
  • Patent number: 9582406
    Abstract: Method and system for automatically generating executable system-level tests. The method includes obtaining a system design including interrelation between components of the system design, actions the components are operable to perform, and constraints relating to the performance of the actions; receiving at least an initial action input to be tested; automatically generating a complete test scenario including: solving a logic layer CSP, including automatically scheduling actions and data paths of the test scenario, and assigning values to logic attributes of the actions and data, satisfying constraints relating to the logic layer, and solving a data layer CSP, satisfying constraints relating to data attributes taking into account the constraints relating to the logic layer; and generating the executable system-level test by assembling the initial action and the set of scheduled actions and data paths and the data attributes.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: February 28, 2017
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Marat Teplitsky, Matan Vax, Amit Metodi
  • Patent number: 8560893
    Abstract: A method and system are provided for automatically generating executable system-level tests from an initial action or partially specified scenario by accumulating necessary complement actions and forming a set of constraints required by the initial action and the necessary complement actions. The set of constraints is solved by a constraint solving engine to provide an at least partial sequence of the actions and parameters thereto that satisfies the set of constraints. The sequence of actions that comply with the set of constraints are used to generate an executable system-level test code.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: October 15, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Yoav Hollander, Efrat Gavish, Vitaly Lagoon, Matan Vax