Abstract: The invention relates to a data carrier (100) with a chip (10) which stores energy (13) as well as information for contact-bound or contactless inductive communication, and with a plurality of excitable chip sensors (11) integrated in the chip (10), which, after excitation (12), pass on a signal (18) to a CPU (19) of the chip (10), in which the signal (18) is processed. The invention is characterized in that, independently of storing energy (13) as well as information by the chip (10), the excitation (12) is specifically adjustable by the chip (10) for the purpose of additionally storing information and is adaptable to the requirements of processing the signal (18) in the CPU (19).

Abstract: In a method for generating a cipher-based message authentication code, a state array (25) comprised of rows (31-34) of bytes (S?0-S?15) and columns (41-44) of bytes (S?0-S?15) based on a message to be transmitted is generated. The cipher-based message authentication code is generated by retaining the bytes (29, 30) of at least one row (32, 34) of the state array (25).

Abstract: A method for secure data reading and a data handling system is provided. The method protects the data reading from fault attacks by repeating read request in an interleaved manner, in particular the method comprises the steps of (M200) dispatching a first read request; (M400) dispatching a second read request; (M600) dispatching a further first read request; and (M1000-a) producing an anomaly signal if a first result produced by the memory in response to the first read request does not agree with a further first result produced by the memory in response to the further first read request.

Abstract: A contactless tag reader device comprises upper and lower electrodes which together define a tag location zone between them in which multiple tags can be placed. The lower electrode and the upper electrode are offset from each other such that they substantially do not overlap. This structure is used to sandwich tags vertically between two horizontally (laterally) offset reader electrodes. This enables power coupling and data transfer using capacitive coupling.

Abstract: It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key.

Abstract: In order to provide a data processing device (100), in particular an embedded system, such as a smart card, comprising at least one integrated circuit (102) carrying out calculations, in particular cryptographic operations, as well as a method for operating such data processing device (100) wherein costs are minimised, the requirements on the complexity of the design are decreased, the power consumption is reduced and the performance of a cryptographic operation is enhanced, it is proposed to protect the integrated circuit (102) against cryptanalysis, in particular against differential power analysis, by hiding the power consumption profiles of said calculations and by alternating between different power consumption profiles, in particular by introducing one or more counter signals (51; 61; 71, 81), for example one or more signals of at least roughly opposite amplitude relative to an average amplitude, wherein the sum of the respective amplitude of the one or more original or true signals (50; 60; 70, 80) may

Abstract: A contactless tag reader device comprises upper and lower electrodes which together define a tag location zone between them in which multiple tags can be placed. The lower electrode and the upper electrode are offset from each other such that they substantially do not overlap. This structure is used to sandwich tags vertically between two horizontally (laterally) offset reader electrodes. This enables power coupling and data transfer using capacitive coupling.

Abstract: In a method for generating a cipher-based message authentication code, a state array (25) comprised of rows (31-34) of bytes (S?0-S?15) and columns (41-44) of bytes (S?0-S?15) based on a message to be transmitted is generated. The cipher-based message authentication code is generated by retaining the bytes (29, 30) of at least one row (32, 34) of the state array (25).

Abstract: A method for secure data reading and a data handling system is provided. The method protects the data reading from fault attacks by repeating read request in an interleaved manner, in particular the method comprises the steps of (M200) dispatching a first read request; (M400) dispatching a second read request; (M600) dispatching a further first read request; and (M1000-a) producing an anomaly signal if a first result produced by the memory in response to the first read request does not agree with a further first result produced by the memory in response to the further first read request.

Abstract: In order to improve a machine tool device, comprising a machine bed with at least one receiving area for receiving chips produced during the machining of a workpiece, and at least one discharging device for discharging the chips from the receiving area, so that it is usable with flexibility, it is proposed that the at least one discharging device comprise at least one conveying device for conveying the chips from the receiving area and/or at least one flushing device for flushing the chips out of the receiving area and/or at least one suction device for evacuating the chips from the receiving area by suction, and that the machine bed comprise at least one first machine bed section for the arrangement of the conveying device, at least one second machine bed section for the arrangement of the flushing device and at least one third machine bed section for the arrangement of the suction device, so that the machine bed is adapted for selective equipment with the conveying device and/or the flushing device and/or t

Abstract: A control device is connected to at least one encryption/decryption device via at least one communication device. The control device is connected to a round key generator via at least one further communication device. The control device has at least one external key input, the at least one encryption/decryption device has at least one external data input and at least one external data output, and the at least one encryption/decryption device and the round key generator are decoupled from one another.

Abstract: It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key.

Abstract: In order to further develop an electronic memory component (100 or 100?), comprising at least one memory cell matrix (10) which is embedded in and/or let into at least one doped receiving substrate (20), in such a way that a light incidence taking the form of a so-called light attack is detected directly or sensed immediately without dead times (=contribution to chip development), it is proposed,—that the receiving substrate (20) be covered and/or surrounded at least partially and/or on at least one of its surfaces remote from the memory cell matrix (10) by at least one top/protective substrate (30) oppositely doped to the receiving substrate (20) and—that at least one of the substrates (20 or 30), for example the receiving substrate (20) and/or in particular the top/protective substrate (30), be in contact (12a or 12b) or connection (32) with at least one circuit arrangement (24 or 34 respectively) for the detection of voltages or currents caused by charge carriers generated upon light incidence.

Abstract: In order to provide a processor for encrypting and/or decrypting data and a method of encrypting and/or decrypting data using such a processor, which are characterized by a lower storage requirement and greater safety against attacks on the rounding key generation than previously known and which are preferably embodied as, respectively, an AES coprocessor and a method of AES calculation, it is provided that a control device (12) is connected to at least one encryption/decryption means (14) via at least one communication means (16), the control device (12) is connected to at least one rounding key generation means (18) via at least one further communication means (20), the control device (12) has at least one external key input (22), the at least one encryption/decryption means (14) has at least one external data input (24) and at least one external data output (26), and the at least one encryption/decryption means (14) and the at least one rounding key generation means (18) are decoupled from one another.

Abstract: In order to further develop an electronic memory component (100 or 100?), comprising at least one memory cell matrix (10) which is embedded in and/or let into at least one doped receiving substrate (20), in such a way that a light incidence taking the form of a so-called light attack is detected directly or sensed immediately without dead times (=contribution to chip development), it is proposed,—that the receiving substrate (20) be covered and/or surrounded at least partially and/or on at least one of its surfaces remote from the memory cell matrix (10) by at least one top/protective substrate (30) oppositely doped to the receiving substrate (20) and—that at least one of the substrates (20 or 30), for example the receiving substrate (20) and/or in particular the top/protective substrate (30), be in contact (12a or 12b) or connection (32) with at least one circuit arrangement (24 or 34 respectively) for the detection of voltages or currents caused by charge carriers generated upon light incidence.

Abstract: In order to develop an electronic memory component or memory module (100), having at least one memory cell area (10) in which physical states (P) representing regular data are mapped by means of at least one mapping function (A) that describes at least one error correction code, for example at least one Hamming code, and also a method of operating at least one electronic memory component or memory module (100) of the abovementioned type, such that on the one hand the error detection probability is considerably increased and on the other hand unwritten memory blocks can be reliably distinguished from memory blocks that have already been written to once before, it is proposed that at least one further physical state in the form of at least one exceptional or special state (L, S) in the error correction code can be detected, encoded and/or indicated by means of the mapping function (A).

Abstract: A non-linear optical device utilizes laterally asymmetrical quantum dot structures (D1-D5) that are tunable in terms of their lateral asymmetry by bias potentials (V1, V2) applied to laterally extending electrode structures (13, 14).