Patents by Inventor Matsuro Koterasawa

Matsuro Koterasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7649417
    Abstract: An input bias cancellation stage for an audio operational amplifier is provided. The input bias cancellation stage includes an input differential pair, a current mirror, and a bias duplicator transistor that substantially duplicates the input bias current. The bias duplicator transistor receives substantially the same emitter current as the transistors in the input differential pair, and has substantially the same Vce as the transistors in the input differential pair. The current mirror mirrors the duplicated bias current and subtracts it from the bases of the transistors in the input differential pair so that the input bias current is substantially cancelled.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: January 19, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Matsuro Koterasawa
  • Patent number: 4926109
    Abstract: A circuit is shown in which a voltage regulator has an output stage that operates as a Darlington when the input-output differential exceeds a threshold. The circuit automatically switches to a common emitter output and an emitter-follower driver when the differential falls below the threshold. A current limiter prevents excessive common current when the output transistor is saturated.
    Type: Grant
    Filed: June 21, 1989
    Date of Patent: May 15, 1990
    Assignee: National Semiconductor Corporation
    Inventor: Matsuro Koterasawa
  • Patent number: 4587491
    Abstract: A class AB monolithic silicon IC output stage is shown wherein the main output transistors are NPN structures. The current sourcing transistor is provided with an additional scaled down reference emitter and the two emitters connected to the inputs of an op amp which has its output coupled to drive the current sink transistor. The base of the current source transistor is driven from a high gain driver transistor stage which may also contain a d-c level shifter that permits the inclusion of a complementary current sink transistor that can greatly reduce cross-over distortion while conducting only quiescent current.
    Type: Grant
    Filed: April 29, 1985
    Date of Patent: May 6, 1986
    Assignee: National Semiconductor Corporation
    Inventor: Matsuro Koterasawa
  • Patent number: 4528496
    Abstract: A current mirror provides an output current, for use in an IC, that is a multiple of a reference current input. A high gain negative feedback loop is coupled between the current mirror reference input and the output device. This forces the reference input to operate as a diode and stabilizes the circuit operation so that the output current accurately reflects the reference current independently of the .beta. of the devices.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: July 9, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Toyojiro Naokawa, Matsuro Koterasawa