Abstract: A gate driver device includes a first field effect transistor and a first driver circuit. The first field effect transistor includes a first gate electrode and a first backgate structure. The first driver circuit supplies a first backgate drive signal to the first backgate structure.

Abstract: A gate driver integrated circuit includes a high-side region that operates in a first voltage domain according to a first pair of supply terminals that include a first lower supply terminal and a first higher supply terminal; a low-side region that operates in a second voltage domain according to a second pair of supply terminals; at least one termination region that electrically isolates the high-side region from the low-side region; a first electrostatic device arranged in the high-side region and connected to the first pair of supply terminals; a second electrostatic device arranged in the low-side region and connected to the second pair of supply terminals; and a third electrostatic device connected to a lower supply terminal of the first pair of supply terminals and is coupled in series with the first electrostatic device.

Abstract: A gate driver device includes a first field effect transistor and a first driver circuit. The first field effect transistor includes a first gate electrode and a first backgate structure. The first driver circuit supplies a first backgate drive signal to the first backgate structure.

Abstract: A gate driver integrated circuit includes a high-side region that operates in a first voltage domain according to a first pair of supply terminals that include a first lower supply terminal and a first higher supply terminal; a low-side region that operates in a second voltage domain according to a second pair of supply terminals; at least one termination region that electrically isolates the high-side region from the low-side region; a first electrostatic device arranged in the high-side region and connected to the first pair of supply terminals; a second electrostatic device arranged in the low-side region and connected to the second pair of supply terminals; and a third electrostatic device connected to a lower supply terminal of the first pair of supply terminals and is coupled in series with the first electrostatic device.

Abstract: A gate driver integrated circuit includes a high-side region that operates in a first voltage domain according to a first pair of supply terminals that include a first lower supply terminal and a first higher supply terminal; a low-side region that operates in a second voltage domain according to a second pair of supply terminals; a low-voltage region the operates in a third voltage domain; at least one termination region that electrically isolates the high-side region from the low-side region and the low-voltage region; a first electrostatic device arranged in the high-side region and connected to the first pair of supply terminals; a second electrostatic device arranged in the low-side region and connected to the second pair of supply terminals; and a third electrostatic device connected to a lower supply terminal of the first pair of supply terminals and is coupled in series with the first electrostatic device.

Abstract: A gate driver integrated circuit includes a high-side region that operates in a first voltage domain according to a first pair of supply terminals that include a first lower supply terminal and a first higher supply terminal; a low-side region that operates in a second voltage domain according to a second pair of supply terminals; a low-voltage region the operates in a third voltage domain; at least one termination region that electrically isolates the high-side region from the low-side region and the low-voltage region; a first electrostatic device arranged in the high-side region and connected to the first pair of supply terminals; a second electrostatic device arranged in the low-side region and connected to the second pair of supply terminals; and a third electrostatic device connected to a lower supply terminal of the first pair of supply terminals and is coupled in series with the first electrostatic device.

Abstract: A method of detecting objects includes transmitting toward an object a first acoustic signal including a first set of pulses including a first number of pulses, and checking if a first echo signal resulting from reflection of the first acoustic signal is received with an intensity reaching an echo detection threshold. If the intensity of the first echo signal reaches the echo detection threshold, the distance to the object is calculated as a function of the time delay of the first echo signal. If the intensity of the first echo signal fails to reach the echo detection threshold, one or more further acoustic signals are transmitted including a set of pulses wherein the number of pulses is increased with respect to the number of pulses in said first acoustic signal.

Abstract: A device voltage shifter includes a first voltage reference node, a second voltage reference node, an output node and a clamp node. A first high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node and a second conduction terminal coupled to the clamp node. A second high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the clamp node and a second conduction terminal coupled to the second voltage reference node. A third high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node, a control terminal coupled to the clamp node, and a second conduction terminal coupled to the output node. A voltage regulator of the voltage shifter is coupled between the output node and the clamp node.

Abstract: A method of detecting objects includes transmitting toward an object a first acoustic signal including a first set of pulses including a first number of pulses, and checking if a first echo signal resulting from reflection of the first acoustic signal is received with an intensity reaching an echo detection threshold. If the intensity of the first echo signal reaches the echo detection threshold, the distance to the object is calculated as a function of the time delay of the first echo signal. If the intensity of the first echo signal fails to reach the echo detection threshold, one or more further acoustic signals are transmitted including a set of pulses wherein the number of pulses is increased with respect to the number of pulses in said first acoustic signal.

Abstract: A device voltage shifter includes a first voltage reference node, a second voltage reference node, an output node and a clamp node. A first high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node and a second conduction terminal coupled to the clamp node. A second high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the clamp node and a second conduction terminal coupled to the second voltage reference node. A third high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node, a control terminal coupled to the clamp node, and a second conduction terminal coupled to the output node. A voltage regulator of the voltage shifter is coupled between the output node and the clamp node.

Abstract: A device voltage shifter includes a first voltage reference node, a second voltage reference node, an output node and a clamp node. A first high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node and a second conduction terminal coupled to the clamp node. A second high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the clamp node and a second conduction terminal coupled to the second voltage reference node. A third high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node, a control terminal coupled to the clamp node, and a second conduction terminal coupled to the output node. A voltage regulator of the voltage shifter is coupled between the output node and the clamp node.

Abstract: A device voltage shifter includes a first voltage reference node, a second voltage reference node, an output node and a clamp node. A first high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node and a second conduction terminal coupled to the clamp node. A second high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the clamp node and a second conduction terminal coupled to the second voltage reference node. A third high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node, a control terminal coupled to the clamp node, and a second conduction terminal coupled to the output node. A voltage regulator of the voltage shifter is coupled between the output node and the clamp node.

Abstract: The disclosure relates to a driving method for obtaining a linear gain variation of a transconductance amplifier that includes a first differential transistor cell, with adjustment of a driving voltage value of a degenerative driving transistor of the transconductance amplifier The method includes generating an output current signal of a second differential cell corresponding to the first differential transistor cell of the transconductance amplifier, the output current signal having a linear relationship with a transconductance value of the second differential cell as the driving voltage varies; generating a reference current signal having a linear relationship with a differential input voltage; comparing the output current signal and the reference current signal for adjusting the driving voltage value; and modifying the transconductance value of the second differential cell up to a balance of the current signals.

Abstract: The disclosure relates to a driving method for obtaining a linear gain variation of a transconductance amplifier that includes a first differential transistor cell, with adjustment of a driving voltage value of a degenerative driving transistor of the transconductance amplifier The method includes generating an output current signal of a second differential cell corresponding to the first differential transistor cell of the transconductance amplifier, the output current signal having a linear relationship with a transconductance value of the second differential cell as the driving voltage varies; generating a reference current signal having a linear relationship with a differential input voltage; comparing the output current signal and the reference current signal for adjusting the driving voltage value; and modifying the transconductance value of the second differential cell up to a balance of the current signals.