Abstract: An electronic circuit tester (e.g., for testing integrated circuit wafers or packaged integrated circuits) is provided. The tester is preferably based on a relatively inexpensive computer system such as a personal computer and includes at least one high-precision clock circuit that is programmable with respect to frequency and number of clock pulses. The high-precision clock circuit is connectable to the circuit being tested to permit certain timing-critical tests to be performed, even though a large number of other data channels in the tester are controlled by a relatively low speed clock circuit. The tester also includes analog circuitry that can be programmed to provide various analog signals suitable for performing parametric testing on an electronic device under test.

Abstract: A method and apparatus for maximizing the data transmission rate from a source data path to selected channels of a destination data path having a different width from the source data path. In a preferred embodiment, the data transfer circuit includes at least one transfer register that is typically of the same width as the data source. Each bit from the transfer register is input to a plurality of multiplexers, each of which typically selects a single bit and outputs the selected bit to the destination.

Abstract: The present invention provides a method and apparatus for increasing the vector rate of an integrated circuit test system and simplifying the wiring of the tester to the device under test. The tester incorporates circuitry that allows the CPU to remap assignments of tester channels in the CPU address space during testing.

Abstract: A method and apparatus for maximizing the data transmission rate from a source data path to selected channels of a destination data path having a different width from the source data path. In a preferred embodiment, the data transfer circuit includes at least one transfer register that is typically of the same width as the data source. Each bit from the transfer register is input to a plurality of multiplexers, each of which typically selects a single bit and outputs the selected bit to the destination.

Abstract: A system and method for performing complex queries in a database system. The method identifies a single type of entity in the database. A table or set of columns is formed that is used to track which entries meet the various subcriteria in a complex query through entry of binary marker bits. Logical operations may be performed on such marker bits to identify those entities meeting the specified search criteria. Through appropriate search planning, the bits may be "reused" during the query search. The method may be used in combination with, for example, index searches and other optimized searching techniques.

Abstract: A method and apparatus for testing an integrated circuit device. An integrated circuit device undergoes testing in at least two different stages of the manufacturing process. At one stage, the semiconductor wafer containing multiple chip dice is probed by a probe tester that tests each of the dice individually. At another stage, after an individual chip die has been encapsulated in a package, a package tester tests and exercises the functions of the chip.

Abstract: A method for programming programmable EPROM elements in programmable logic arrays. Multiple programming passes are made through the array, with the programming pulses decreasing in duration on each pass.