Patents by Inventor Matthew D. Brubaker
Matthew D. Brubaker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11918864Abstract: Embodiments of putter-type golf club head comprising a striking surface capable of achieving consistent ball speeds across the striking surface to account for various ball impact locations are described herein. The striking surface has at least two materials that differ in concentration away from the geometric center of the striking surface to provide this consistency. Consistent (or uniform) ball speed is achieved throughout the striking surface as the portion of the golf ball that contacts the striking surface interacts with at least two materials having a differing material characteristic.Type: GrantFiled: August 1, 2022Date of Patent: March 5, 2024Assignee: Karsten Manufacturing CorporationInventors: Alex G. Woodward, Matthew T. Schier, Murphy R. Alexander, Anthony D. Serrano, James D. Willmott, Erik M. Henrikson, David A. Higdon, Cole D. Brubaker, John A. Solheim
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Patent number: 9460921Abstract: A nanowire article includes a substrate; a plurality of nanowires disposed on the substrate, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table; and a superlattice layer interposed between the substrate and the plurality of gallium nitride nanowires. A process for producing a nanowire article includes disposing a superlattice layer on a substrate; disposing a first buffer layer on the superlattice layer; contacting the first buffer layer with a precursor; and forming a plurality of nanowires from the precursor on the first buffer layer to form the nanowire article, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table.Type: GrantFiled: April 6, 2015Date of Patent: October 4, 2016Assignees: THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF COMMERCE, REGENTS OF THE UNIVERISTY OF COLORADOInventors: Kristine A. Bertness, Matthew D. Brubaker, William M. Old
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Publication number: 20150214050Abstract: A nanowire article includes a substrate; a plurality of nanowires disposed on the substrate, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table; and a superlattice layer interposed between the substrate and the plurality of gallium nitride nanowires. A process for producing a nanowire article includes disposing a superlattice layer on a substrate; disposing a first buffer layer on the superlattice layer; contacting the first buffer layer with a precursor; and forming a plurality of nanowires from the precursor on the first buffer layer to form the nanowire article, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table.Type: ApplicationFiled: April 6, 2015Publication date: July 30, 2015Inventors: Kristine A. Bertness, Matthew D. Brubaker, William M. Old
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Patent number: 7872900Abstract: A non-volatile resistive switching memory that includes a homogeneous material which changes between the insulative and conductive states due to correlations between electrons, particularly via a Mott transition. The material is crystallized into the conductive state and does not require electroforming.Type: GrantFiled: November 8, 2007Date of Patent: January 18, 2011Assignee: Symetrix CorporationInventors: Carlos A. Paz de Araujo, Jolanta Celinska, Matthew D. Brubaker
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Publication number: 20100283028Abstract: An integrated circuit memory cell including: a semiconductor having a first active area, a second active area, and a channel between the active areas; and a layer of a variable resistance material (VRM) directly above the channel. In one embodiment, there is a first conductive layer between the VRM and the channel and a second conductive layer directly above the VRM layer. The VRM preferably is a correlated electron material (CEM). The memory cell comprises a FET, such as a JFET or a MESFET. In another embodiment, there is a layer of an insulating material between the VRM and the channel. In this case, the memory cell may include a MOSFET structure.Type: ApplicationFiled: July 21, 2010Publication date: November 11, 2010Applicant: Symetrix CorporationInventors: Matthew D. Brubaker, Carlos A. Paz de Araujo, Jolanta Celinska
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Patent number: 7778063Abstract: An integrated circuit memory cell including: a semiconductor having a first active area, a second active area, and a channel between the active areas; and a layer of a variable resistance material (VRM) directly above the channel. In one embodiment, there is a first conductive layer between the VRM and the channel and a second conductive layer directly above the VRM layer. The VRM preferably is a correlated electron material (CEM). The memory cell comprises a FET, such as a JFET or a MESFET. In another embodiment, there is a layer of an insulating material between the VRM and the channel. In this case, the memory cell may include a MOSFET structure.Type: GrantFiled: November 8, 2007Date of Patent: August 17, 2010Assignee: Symetrix CorporationInventors: Matthew D. Brubaker, Carlos A. Paz de Araujo, Jolanta Celinska
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Publication number: 20100090172Abstract: A non-volatile resistive switching memory that includes a material which changes between the insulative and conductive states. The material is stabilized against charge trapping by oxygen vacancies by an extrinsic ligand, such as carbon.Type: ApplicationFiled: November 13, 2009Publication date: April 15, 2010Applicant: Symetrix CorporationInventors: Jolanta Celinska, Matthew D. Brubaker, Carlos A. Paz de Araujo
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Patent number: 7639523Abstract: A non-volatile resistive switching memory that includes a material which changes between the insulative and conductive states. The material is stabilized against charge trapping by oxygen vacancies by an extrinsic ligand, such as carbon.Type: GrantFiled: November 8, 2007Date of Patent: December 29, 2009Assignee: Symetrix CorporationInventors: Jolanta Celinska, Matthew D. Brubaker, Carlos A. Paz de Araujo
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Publication number: 20080106926Abstract: An integrated circuit memory cell including: a semiconductor having a first active area, a second active area, and a channel between the active areas; and a layer of a variable resistance material (VRM) directly above the channel. In one embodiment, there is a first conductive layer between the VRM and the channel and a second conductive layer directly above the VRM layer. The VRM preferably is a correlated electron material (CEM). The memory cell comprises a FET, such as a JFET or a MESFET. In another embodiment, there is a layer of an insulating material between the VRM and the channel. In this case, the memory cell may include a MOSFET structure.Type: ApplicationFiled: November 8, 2007Publication date: May 8, 2008Applicant: Symetrix CorporationInventors: Matthew D. Brubaker, Carlos A. Paz de Araujo, Jolanta Celinska
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Publication number: 20080106927Abstract: A non-volatile resistive switching memory that includes a material which changes between the insulative and conductive states. The material is stabilized against charge trapping by oxygen vacancies by an extrinsic ligand, such as carbon.Type: ApplicationFiled: November 8, 2007Publication date: May 8, 2008Applicant: Symetrix CorporationInventors: Jolanta Celinska, Matthew D. Brubaker, Carlos A. Paz de Araujo
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Publication number: 20080107801Abstract: A method of making a variable resistance material (VRM), the method comprising providing a precursor comprising a metallorganic or organometallic solvent containing a metal moiety suitable for forming the VRM, depositing the precursor on a substrate to form a thin film of the precursor, and heating the thin film to form the VRM. The preferred solvent comprises octane.Type: ApplicationFiled: November 8, 2007Publication date: May 8, 2008Applicant: Symetrix CorporationInventors: Jolanta Celinska, Carlos A. Paz de Araujo, Matthew D. Brubaker
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Publication number: 20080106925Abstract: A non-volatile resistive switching memory that includes a homogeneous material which changes between the insulative and conductive states due to correlations between electrons, particularly via a Mott transition. The material is crystallized into the conductive state and does not require electroforming.Type: ApplicationFiled: November 8, 2007Publication date: May 8, 2008Applicant: Symetrix CorporationInventors: Carlos A. Paz de Araujo, Jolanta Celinska, Matthew D. Brubaker
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Publication number: 20040028810Abstract: A chemical vapor deposition (CVD) reactor comprising: a reactor chamber; a substrate holder located within the reactor chamber; a gas inlet system arranged to provide a gas flow rotating above the substrate holder; and a gas exhaust. The flow characteristics of the precursor gas are controlled to equalize the thin film thickness across the substrate surface by forcing the gas into a smaller volume as it moves across the substrate. With a central exhaust, this is done by reducing the height of the reactor chamber with increasing proximity to the center of the reactor chamber so that the reactor volume per unit distance decreases as the gas moves from the inlet to the exhaust.Type: ApplicationFiled: December 4, 2002Publication date: February 12, 2004Applicant: Primaxx, Inc.Inventors: Robert W. Grant, Benjamin J. Petrone, Matthew D. Brubaker, Paul D. Mumbauer
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Publication number: 20020195055Abstract: Chemical vapor deposition reactor incorporating gas flow vortex formation for uniform chemical vapor deposition upon a stationary wafer substrate. Gas flow including chemical vapors is introduced in tangential fashion to the interior of the heated reactor to provide for suitable uniform boundary layer control within the reactor upon the stationary wafer substrate.Type: ApplicationFiled: August 6, 2002Publication date: December 26, 2002Inventors: Robert W. Grant, Benjamin J. Petrone, Matthew D. Brubaker, Paul D. Mumbauer
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Patent number: 6428847Abstract: Chemical vapor deposition reactor incorporating gas flow vortex formation for uniform chemical vapor deposition upon a stationary wafer substrate. Gas flow including chemical vapors is introduced in tangential fashion to the interior of the heated reactor to provide for suitable uniform boundary layer control within the reactor upon the stationary wafer substrate.Type: GrantFiled: October 16, 2000Date of Patent: August 6, 2002Assignee: Primaxx, Inc.Inventors: Robert W. Grant, Benjamin J. Petrone, Matthew D. Brubaker, Paul D. Mumbauer