Patents by Inventor Matthew F. Easley

Matthew F. Easley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8958516
    Abstract: A NICAM audio signal re-sampler may include a non-linear interpolator configured to interpolate in a non-linear manner between sequential digital samples that are based on a stream of demodulated NICAM audio samples. A phase differential calculator may be included that compares phase information at different resolutions.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: February 17, 2015
    Assignee: THAT Corporation
    Inventors: Roger R. Darr, Matthew F. Easley, Matthew S. Barnhill
  • Publication number: 20130282385
    Abstract: A NICAM audio signal re-sampler may include a non-linear interpolator configured to interpolate in a non-linear manner between sequential digital samples that are based on a stream of demodulated NICAM audio samples. A phase differential calculator may be included that compares phase information at different resolutions.
    Type: Application
    Filed: June 19, 2013
    Publication date: October 24, 2013
    Inventors: Roger R. Darr, Matthew F. Easley, Matthew S. Barnhill
  • Patent number: 8494104
    Abstract: A NICAM audio signal re-sampler may include a non-linear interpolator configured to interpolate in a non-linear manner between sequential digital samples that are based on a stream of demodulated NICAM audio samples. A phase differential calculator may be included that compares phase information at different resolutions.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: July 23, 2013
    Assignee: THAT Corporation
    Inventors: Roger R. Darr, Matthew F. Easley, Matthew S. Barnhill
  • Publication number: 20120008724
    Abstract: A NICAM audio signal re-sampler may include a non-linear interpolator configured to interpolate in a non-linear manner between sequential digital samples that are based on a stream of demodulated NICAM audio samples. A phase differential calculator may be included that compares phase information at different resolutions.
    Type: Application
    Filed: September 19, 2011
    Publication date: January 12, 2012
    Applicant: THAT Corporation
    Inventors: Roger R. Darr, Matthew F. Easley, Matthew S. Barnhill
  • Patent number: 8023590
    Abstract: A NICAM audio signal re-sampler may include a non-linear interpolator configured to interpolate in a non-linear manner between sequential digital samples that are based on a stream of demodulated NICAM audio samples. A phase differential calculator may be included that compares phase information at different resolutions.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: September 20, 2011
    Assignee: THAT Corporation
    Inventors: Roger R. Darr, Matthew F. Easley, Matthew S. Barnhill
  • Patent number: 7940842
    Abstract: An algorithm calculates spectral compression/expansion filter coefficients using a value proportional to a reciprocal of a feedback/feedforward signal and stores the coefficients to a lookup table. The lookup table is indexed by a pre selected set of coefficient bits to generate a filter coefficient function. A first portion of the lookup table stores a plurality of discrete values at index points of a line segment corresponding to a filter coefficient function approximation, so as to generate an initial discrete value corresponding to the filter coefficient function at a value of the high order bits and a second portion stores a plurality of slope values, which indicates a slope of the filter coefficient function. A linear circuit interpolates/decimates an approximation of the compression/expansion filter coefficient function based on the slope value, the initial discrete value and a preselected set of low order bits of the reciprocal value.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: May 10, 2011
    Assignee: THAT Corporation
    Inventors: Matthew F. Easley, Roger Darr, Matthew Barnhill
  • Publication number: 20080317114
    Abstract: An algorithm calculates spectral compression/expansion filter coefficients using a value proportional to a reciprocal of a feedback/feedforward signal and stores the coefficients to a lookup table. The lookup table is indexed by a pre selected set of coefficient bits to generate a filter coefficient function. A first portion of the lookup table stores a plurality of discrete values at index points of a line segment corresponding to a filter coefficient function approximation, so as to generate an initial discrete value corresponding to the filter coefficient function at a value of the high order bits and a second portion stores a plurality of slope values, which indicates a slope of the filter coefficient function. A linear circuit interpolates/decimates an approximation of the compression/expansion filter coefficient function based on the slope value, the initial discrete value and a preselected set of low order bits of the reciprocal value.
    Type: Application
    Filed: June 6, 2008
    Publication date: December 25, 2008
    Inventors: Matthew F. Easley, Roger Darr, Matthew Barnhill
  • Patent number: 6259482
    Abstract: The present invention includes a digital stereo modulator having a digital left channel input and a digital right channel input into a Digital BTSC Stereo Generator that contains a Sine Table. The Digital BTSC Stereo Generator generates and outputs the following signals: 2*FH, compressed BTSC L−R, preemphasized BTSC L+R, and FH. A digital multiplier amplitude modulates the 2*FH carrier with the compressed BTSC L−R output, and the resultant signal is a Stereo Subchannel AM-DSB-SC BTSC Compressed L−R, which is then summed together with the preemphasized BTSC L+R, and FH by a digital summer. The output of the digital summer is the composite BTSC output without SAP or Professional channels. The Digital BTSC Stereo Generator transforms left and right inputs into the outputs described above by utilizing clock inputs 3*FH and 12*FH. A digital PLL phase locks 3*FH and 12*FH clocks to a Horizontal Synch (FH) reference, for input to the Digital BTSC Stereo Generator.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: July 10, 2001
    Inventors: Matthew F. Easley, Roger Darr
  • Patent number: 5001729
    Abstract: A phase locked loop circuit which eliminates the phase difference between an incoming reference signal and a sampling signal by sampling the incoming reference signal to produce a sampled signal. The sign of the sampled signal at two sample points is compared to determine in which quadrant a predetermined one of these sample points is located. The phase adjustment to the sampling signal is dependent upon the quadrant in which this sample point is located and the magnitude of this sample point. A large phase difference produces a large phase adjustment so that this sample point is quickly locked onto the zero-crossing points of the incoming reference signal. A small phase difference produces a small phase adjustment and prevents jitter. The lock onto the zero-crossing point of the incoming reference signal minimizes the data error rate of the modem.
    Type: Grant
    Filed: July 17, 1989
    Date of Patent: March 19, 1991
    Assignee: Hayes Microcomputer Products, Inc.
    Inventors: Taruna Tjahjadi, Matthew F. Easley, Randy D. Nash
  • Patent number: 4894847
    Abstract: A modem with improved signal processing and handshaking capabilities as described. Two digital signal processors are used to perform independent, concurrent operations so that a faster execution rate is obtained and more precise calculations are made possible. The modem also uses an improved handshaking technique which allows the modem to maintain compatibility with existing 1200 and 2400 bps modems while allowing for negotiation for 4800 and 9600 bps communications. The modem also incorporates an improved baud clock recovery circuit which dynamically adjusts the actual sampling point in a manner dependent upon the difference between the actual sampling point and the optimal sampling point. This allows the actual sampling point to converge upon the desired sampling point at a high rate while minimizing jitter around the optimal sampling point.
    Type: Grant
    Filed: May 26, 1987
    Date of Patent: January 16, 1990
    Assignee: Hayes Microcomputer Products, Inc.
    Inventors: Taruna Tjahjadi, German E. Correa, Matthew F. Easley, John N. Martin, Charles H. McCorvey, Jr., Randy D. Nash, Cynthia A. Panella, Michael L. Rubinstein, Martin H. Sauser, Jr., David F. Strawn, George R. Thomas
  • Patent number: 4868864
    Abstract: An improved V.22 bis 2400 bits per second (bps) handshake sequence detector. An incoming phase keyed (PSK) handshake sequence is autocorrelated using a frequency shift keyed (FSK) receiver (101). The autocorrelated signal is then filtered by a low pass filter (106). The autocorrelated, low pass filtered signal is then alternately fed, at a 1200 Hz rate, to two detectors (114,116). Each of the detectors (114,116) looks for one half of the handshake sequence. The output of each detector (114,116) is provided to an OR-gate (122). The 2400 bps handshake sequence is declared to be detected when either one or both of the detectors (114,116) detects its corresponding portion of the sequence.
    Type: Grant
    Filed: April 1, 1988
    Date of Patent: September 19, 1989
    Assignee: Hayes Microcomputer Products, Inc.
    Inventors: Taruna Tjahjadi, Cynthia A. Panella, Matthew F. Easley, Randy D. Nash, Steven R. Sweitzer, John N. Martin, German E. Correa, George R. Thomas
  • Patent number: 4849703
    Abstract: An improved baud clock recovery, synchronization and data sampling circuit for a modem. A CODEC (41) samples the incoming signal at a rate determined by the sample clock output of a presettable counter (236). The sampled signal is then squared (231) and bandpass filtered (232) to provide a recovered baud clock. A detector (233) signals the positive going zero-crossing points of the recovered baud clock. A lead/lag calculator (234) determines which of the signal samples is nearest the zero-crossing point. The calculator (234) then determines whether this and every subsequent 12th sampling point leads or lags the zero-crossing point by inspecting the sign of the recovered baud clock and adjusts the preset inputs of the counter (236) to cause the sample points to occur at the zero-crossing point.
    Type: Grant
    Filed: April 1, 1988
    Date of Patent: July 18, 1989
    Assignee: Hayes Microcomputer Products, Inc.
    Inventors: Matthew F. Easley, German E. Correa, Randy D. Nash, Cynthia A. Panella, Taruna Tjahjadi