Abstract: Disclosed herein are techniques for balancing write commands directed to a non-volatile memory. According to some embodiments, a method may include caching a plurality of write commands into a write cache, and, in response to determining that an available capacity of the write cache satisfies a first threshold value: performing at least one write operation by directing data associated with the write commands in the write cache to the first partition of the non-volatile memory in response to determining that an available capacity of a first partition of the non-volatile memory satisfies a second threshold value; and performing at least one write operation by directing data associated with the write commands in the write cache to a second partition of the non-volatile memory in response to determining that the available capacity of the first partition of the non-volatile memory does not satisfy the second threshold value.

Abstract: Disclosed herein are techniques for balancing write commands directed to a non-volatile memory. According to some embodiments, a method may include caching a plurality of write commands into a write cache, and, in response to determining that an available capacity of the write cache satisfies a first threshold value: performing at least one write operation by directing data associated with the write commands in the write cache to the first partition of the non-volatile memory in response to determining that an available capacity of a first partition of the non-volatile memory satisfies a second threshold value; and performing at least one write operation by directing data associated with the write commands in the write cache to a second partition of the non-volatile memory in response to determining that the available capacity of the first partition of the non-volatile memory does not satisfy the second threshold value.

Abstract: Disclosed herein are techniques for reducing write amplification when processing write commands directed to a non-volatile memory. According to some embodiments, the method can include the steps of (1) receiving a first plurality of write commands and a second plurality of write commands, where the first plurality of write commands and the second plurality of write commands are separated by a fence command (2) caching the first plurality of write commands, the second plurality of write commands, and the fence command, and (3) in accordance with the fence command, and in response to identifying that at least one condition is satisfied: (i) issuing the first plurality of write commands to the non-volatile memory, (ii) issuing the second plurality of write commands to the non-volatile memory, and (iii) updating log information to reflect that the first plurality of write commands precede the second plurality of write commands.

Abstract: Systems and methods for managing non-volatile memory devices are provided. Embodiments discussed herein provide rapid restart protection for journaling system. The rapid restart protection prevents the NVM from experiencing memory saturation when the NVM system is being forced to handle multiple successive restarts.

Abstract: Disclosed are techniques for managing parity information for data stored on a storage device. A method can be implemented at a computing device communicably coupled to the storage device, and include (1) receiving a request to write data into a data band of the storage device, (2) writing the data into stripes of the data band, comprising, for each stripe of the data band: (i) calculating first parity information for the data written into the stripe, (ii) writing the first parity information into a volatile memory, and (iii) in response to determining that a threshold number of stripes have been written: converting the first parity information into smaller second parity information, and (3) in response to determining that the data band is read-verified: (i) converting the second parity information into smaller third parity information, and (ii) storing the smaller third parity information into a parity band of the storage device.

Abstract: Systems and methods for managing non-volatile memory devices are provided. Embodiments discussed herein provide rapid restart protection for journaling system. The rapid restart protection prevents the NVM from experiencing memory saturation when the NVM system is being forced to handle multiple successive restarts.

Abstract: Disclosed are techniques for managing parity information for data stored on a storage device. A method can be implemented at a computing device communicably coupled to the storage device, and include (1) receiving a request to write data into a data band of the storage device, (2) writing the data into stripes of the data band, comprising, for each stripe of the data band: (i) calculating first parity information for the data written into the stripe, (ii) writing the first parity information into a volatile memory, and (iii) in response to determining that a threshold number of stripes have been written: converting the first parity information into smaller second parity information, and (3) in response to determining that the data band is read-verified: (i) converting the second parity information into smaller third parity information, and (ii) storing the smaller third parity information into a parity band of the storage device.

Abstract: Disclosed herein are techniques for reducing write amplification when processing write commands directed to a non-volatile memory. According to some embodiments, the method can include the steps of (1) receiving a first plurality of write commands and a second plurality of write commands, where the first plurality of write commands and the second plurality of write commands are separated by a fence command (2) caching the first plurality of write commands, the second plurality of write commands, and the fence command, and (3) in accordance with the fence command, and in response to identifying that at least one condition is satisfied: (i) issuing the first plurality of write commands to the non-volatile memory, (ii) issuing the second plurality of write commands to the non-volatile memory, and (iii) updating log information to reflect that the first plurality of write commands precede the second plurality of write commands.

Abstract: Systems and methods for managing data in non-volatile memory devices across a large range of operating temperatures are provided. Embodiments discussed herein selectively reprogram previously programmed data at a temperature that better enables the data to be read regardless of where within the range of operating temperatures the data is being read. Circuitry and methods discussed herein can keep track of a program temperature associated with each portion of non-volatile memory and use this information along with other criteria to selectively perform temperature based moves of data. This enables a mechanism for data to programmed in out-of-bounds temperature ranges to be reprogrammed within an in-bounds temperatures range so that a temperature delta between the reprogrammed temperature and the read operation temperature is below a threshold that ensure efficient and error free read operations to be performed.

Abstract: Systems and methods for handling sudden power failures in non-volatile memory devices such as solid state drives are provided by having the non-volatile memory device boot up in a low power write mode, which limits substantially all programming operations to a single level cell (SLC) mode, as opposed to a normal mode in which the programming operations can be performed in a multi-level cell (MLC) mode. Thus, if the system experiences a sudden power failure when it is being powered solely by AC derived power and the battery is below a level sufficient for powering the device while it is programming in the SLC mode, data integrity will be preserved because the programming operation was being performed in SLC mode. The non-volatile memory device may be permitted to exit out the low power write mode into the normal mode when the charge level of the battery is sufficient for powering the system.

Abstract: Systems and methods for managing data in non-volatile memory devices across a large range of operating temperatures are provided. Embodiments discussed herein selectively reprogram previously programmed data at a temperature that better enables the data to be read regardless of where within the range of operating temperatures the data is being read. Circuitry and methods discussed herein can keep track of a program temperature associated with each portion of non-volatile memory and use this information along with other criteria to selectively perform temperature based moves of data. This enables a mechanism for data to programmed in out-of-bounds temperature ranges to be reprogrammed within an in-bounds temperatures range so that a temperature delta between the reprogrammed temperature and the read operation temperature is below a threshold that ensure efficient and error free read operations to be performed.

Abstract: Systems and methods for managing data in non-volatile memory devices across a large range of operating temperatures are provided. Embodiments discussed herein selectively reprogram previously programmed data at a temperature that better enables the data to be read regardless of where within the range of operating temperatures the data is being read. Circuitry and methods discussed herein can keep track of a program temperature associated with each portion of non-volatile memory and use this information along with other criteria to selectively perform temperature based moves of data. This enables a mechanism for data to programmed in out-of-bounds temperature ranges to be reprogrammed within an in-bounds temperatures range so that a temperature delta between the reprogrammed temperature and the read operation temperature is below a threshold that ensure efficient and error free read operations to be performed.

Abstract: Systems and methods for managing data in non-volatile memory devices across a large range of operating temperatures are provided. Embodiments discussed herein selectively reprogram previously programmed data at a temperature that better enables the data to be read regardless of where within the range of operating temperatures the data is being read. Circuitry and methods discussed herein can keep track of a program temperature associated with each portion of non-volatile memory and use this information along with other criteria to selectively perform temperature based moves of data. This enables a mechanism for data to programmed in out-of-bounds temperature ranges to be reprogrammed within an in-bounds temperatures range so that a temperature delta between the reprogrammed temperature and the read operation temperature is below a threshold that ensure efficient and error free read operations to be performed.

Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

Abstract: Systems and methods for handling sudden power failures in non-volatile memory devices such as solid state drives are provided by having the non-volatile memory device boot up in a low power write mode, which limits substantially all programming operations to a single level cell (SLC) mode, as opposed to a normal mode in which the programming operations can be performed in a multi-level cell (MLC) mode. Thus, if the system experiences a sudden power failure when it is being powered solely by AC derived power and the battery is below a level sufficient for powering the device while it is programming in the SLC mode, data integrity will be preserved because the programming operation was being performed in SLC mode. The non-volatile memory device may be permitted to exit out the low power write mode into the normal mode when the charge level of the battery is sufficient for powering the system.

Abstract: In one embodiment, input-output (I/O) scheduling system detects and resolves priority inversions by expediting previously dispatched requests to an I/O subsystem. In response to detecting the priority inversion, the system can transmit a command to expedite completion of the blocking I/O request. The pending request can be located within the I/O subsystem and expedited to reduce the pendency period of the request.

Abstract: Systems and methods are disclosed for generating efficient reads for a system having non-volatile memory (“NVM”). A read command can be separated by a host processor of the system into two phases: a) transmitting a command to a storage processor of the system, where the command is associated with one or more logical addresses, and b) generating data transfer information. The host processor can generate the data transfer information while the storage processor is processing the command from the host processor. Once the data transfer information has been generated and data has been read from the NVM, the data can be transferred.

Abstract: Systems and methods are disclosed for partitioning data for storage in a non-volatile memory (“NVM”), such as flash memory. In some embodiments, a priority may be assigned to data being stored, and the data may be logically partitioned based on the priority. For example, a file system may identify a logical address within a first predetermined range for higher priority data and within a second predetermined range for lower priority data, such using a union file system. Using the logical address, a NVM driver can determine the priority of data being stored and can process (e.g., encode) the data based on the priority. The NVM driver can store an identifier in the NVM along with the data, and the identifier can indicate the processing techniques used on the associated data.

Abstract: Systems and methods are provided for testing a non-volatile memory, such as a flash memory. The non-volatile memory may be virtually partitioned into a test region and a general purpose region. A test application may be stored in the general purpose region, and the test application can be executed to run a test of the memory locations in the test region. The results of the test may be stored in the general purpose region. At the completion of the test, the test results may be provided from the general purpose region and displayed to a user. The virtual partitions may be removed prior to shipping the electronic device for distribution.

Abstract: Systems and methods are disclosed for dynamically allocating power for a system having non-volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non-volatile memory).