Patents by Inventor Matthew Moon
Matthew Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12005927Abstract: Aspects of the disclosure relate to enabling playing of content at an autonomous vehicle. For example, a request to transport a user on a trip may be received. The autonomous vehicle may be assigned to the trip. Whether the user has enabled a content feature may be determined. In response to determining that the user has enabled the content feature a request for a device identifier is sent to the autonomous vehicle. The device identifier generated at the autonomous vehicle is received. The received device identifier may be sent to a content-enabling computing system including one or more processors in order to enable the user to play content from the client computing device at the autonomous vehicle during the trip.Type: GrantFiled: September 7, 2021Date of Patent: June 11, 2024Assignee: Waymo LLCInventors: Matthew Corey Hall, Maria Moon, Orlee Smith, Erik Wolsheimer, Kyle Bechtel
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Patent number: 12010916Abstract: The energy conversion performance, mechanical robustness, and cost associated with fabrication of a thermoelectric device may be improved by three-dimensional flexible thermoelectrics.Type: GrantFiled: December 4, 2020Date of Patent: June 11, 2024Assignee: The Board of Regents of the Nevada System of Higher Education on Behalf of the University of NevadaInventors: Jaeyun Moon, Matthew Pusko, Kaleab Ayalew, Suraj Venkat Pochampally, Hoyoung Ahn
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Publication number: 20240180432Abstract: The invention provides a system and method for measuring vital signs and motion from a patient. The system features: (i) first and second sensors configured to independently generate time-dependent waveforms indicative of one or more contractile properties of the patient's heart; and (ii) at least three motion-detecting sensors positioned on the forearm, upper arm, and a body location other than the forearm or upper arm of the patient. Each motion-detecting sensor generates at least one time-dependent motion waveform indicative of motion of the location on the patient's body to which it is affixed.Type: ApplicationFiled: February 12, 2024Publication date: June 6, 2024Applicant: SOTERA WIRELESS, INC.Inventors: Jim MOON, Devin McCOMBIE, Marshal DHILLON, Matthew BANET
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Patent number: 11963746Abstract: The invention provides a body-worn monitor featuring a processing system that receives a digital data stream from an ECG system. A cable houses the ECG system at one terminal end, and plugs into the processing system, which is worn on the patient's wrist like a conventional wristwatch. The ECG system features: i) a connecting portion connected to multiple electrodes worn by the patient; ii) a differential amplifier that receives electrical signals from each electrode and process them to generate an analog ECG waveform; iii) an analog-to-digital converter that converts the analog ECG waveform into a digital ECG waveform; and iv) a transceiver that transmits a digital data stream representing the digital ECG waveform (or information calculated from the waveform) through the cable and to the processing system. Different ECG systems, typically featuring three, five, or twelve electrodes, can be interchanged with one another.Type: GrantFiled: August 23, 2021Date of Patent: April 23, 2024Assignee: SOTERA WIRELESS, INC.Inventors: Jim Moon, Henk Visser, II, Robert Kenneth Hunt, Devin McCombie, Marshal Singh Dhillon, Matthew J. Banet
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Publication number: 20240106853Abstract: Techniques are described for improving real-time application protection (RTAP) systems (e.g., web application firewalls (WAFs), runtime application self-protection (RASP) systems). In particular, a device within a trusted network may monitor or test the configuration settings of the RTAP systems, network traffic into the RTAP systems, and/or log information from the RTAP systems. For example, the device may detect drift in a configuration for a particular RTAP system by comparing the configuration settings of the RTAP systems to baseline configuration settings and classifying any detected drift as good drift or bad drift. In some examples, the device may maintain the configuration settings or set the configuration settings as the baseline configuration settings when the configurations settings include good drift from the baseline configuration settings. In other examples, the device may set the configuration settings with the bad drift to the baseline configuration settings.Type: ApplicationFiled: December 4, 2023Publication date: March 28, 2024Inventors: Matthew Thomas McDonald, Jeremy W. Long, Mitch Moon, Isaiah Adonu
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Patent number: 11938738Abstract: In some examples, an apparatus can include a syringe body including an electrical interface at a side surface of the syringe body, an interface at an end of the syringe body including an output at a distal surface of the syringe body, a print material particles reservoir located in the syringe body, and a structure to adapt a volume of the print material particles reservoir to move print material particles out of the print material particles reservoir through the output, where in response to the volume adapting structure moving from a first position to a second position, a signal is transmitted by the electrical interface.Type: GrantFiled: August 30, 2018Date of Patent: March 26, 2024Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew P. Chick, Kenneth K. Smith, Jiwon Moon, Minul Lee, Matthew James Storey, An Tran, Bennett Alexander Nadeau, Zackary Thomas Hickman
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Publication number: 20080019077Abstract: Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer is formed above a lower conductor layer and an upper conductor layer is formed above the dielectric layer. The invention then forms an etch stop layer above the upper conductor layer and the dielectric layer, and forms a hardmask (silicon oxide hardmask, a silicon nitride hardmask, etc.) over the etch stop layer. Next, a photoresist is patterned above the hardmask, which allows the hardmask, the etch stop layer, the dielectric layer, and the lower conductor layer to be etched through the photoresist.Type: ApplicationFiled: August 15, 2007Publication date: January 24, 2008Inventors: Douglas Coolbaugh, Ebenezer Eshun, Natalie Feilchenfeld, Michael Gautsch, Zhong-Xiang He, Matthew Moon, Vidhya Rahmachandran, Barbara Waterhouse
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Publication number: 20070290272Abstract: A BEOL thin-film resistor adapted for flexible integration rests on a first layer of ILD. The thickness of the first layer of ILD and the resistor thickness combine to match the nominal design thickness of vias in the layer of concern. A second layer of ILD matches the resistor thickness and is planarized to the top surface of the resistor. A third layer of ILD has a thickness equal to the nominal value of the interconnections on this layer. Dual damascene interconnection apertures and apertures for making contact with the resistor are formed simultaneously, with the etch stop upper cap layer in the resistor protecting the resistive layer while the vias in the dual damascene apertures are formed.Type: ApplicationFiled: August 29, 2007Publication date: December 20, 2007Inventors: Eric Coker, Douglas Coolbaugh, Ebenezer Eshun, Zhong-Xiang He, Matthew Moon, Anthony Stamper
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Publication number: 20070187787Abstract: A pixel for an image sensor includes a photosensor located within a substrate. A patterned dielectric layer having an aperture registered with the photosensor is located over the substrate. A lens structure is located over the dielectric layer and also registered with the photosensor. A liner layer is located contiguously upon a top surface of the dielectric layer, and the sidewalls and bottom of the aperture. The liner layer provides for enhanced reflection for off-axis incoming light and enhanced capture thereof by the photosensor. When the aperture does not provide a dielectric layer border for a metallization layer embedded within the dielectric layer, an exposed edge of the metallization layer may be chamfered.Type: ApplicationFiled: February 16, 2006Publication date: August 16, 2007Inventors: Kristin Ackerson, James Adkisson, John Ellis-Monaghan, Jeffrey Gambino, Timothy Hoague, Mark Jaffe, Robert Leidy, Matthew Moon, Richard Passel
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Publication number: 20070166909Abstract: A BEOL thin-film resistor adapted for flexible integration rests on a first layer of ILD. The thickness of the first layer of ILD and the resistor thickness combine to match the nominal design thickness of vias in the layer of concern. A second layer of ILD matches the resistor thickness and is planarized to the top surface of the resistor. A third layer of ILD has a thickness equal to the nominal value of the interconnections on this layer. *Dual damascene interconnection apertures and apertures for making contact with the resistor are formed simultaneously, with the etch stop upper cap layer in the resistor protecting the resistive layer while the vias in the dual damascene apertures are formed.Type: ApplicationFiled: January 19, 2006Publication date: July 19, 2007Inventors: Eric Coker, Douglas Coolbaugh, Ebenezer Eshun, Zhong-Xiang He, Matthew Moon, Anthony Stamper
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Publication number: 20070158714Abstract: A MIM capacitor technique is described wherein bottom plates (electrodes) are composed of gate conductor material, and are formed in the same layer, in the same way, using the same masking and processing steps as transistor gates. The top plates (electrodes) are formed using a simple single-mask, single-damascene process. Electrical connections to both electrodes of the MIM capacitor are made via conventional BEOL metallization, requiring no additional dedicated process steps. The bottom plates (formed of gate conductor material) of the MIM capacitors overlie STI regions formed at the same time as STI regions between transistors. Method and apparatus are described.Type: ApplicationFiled: November 21, 2005Publication date: July 12, 2007Applicant: International Business Machines CorporationInventors: Ebenezer Eshun, Jessie Abbotts, Daniel Colello, Douglas Coolbaugh, Zhong-Xiang He, Matthew Moon, Charles Musante, Robert Rassel
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Publication number: 20050272219Abstract: Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer is formed above a lower conductor layer and an upper conductor layer is formed above the dielectric layer. The invention then forms an etch stop layer above the upper conductor layer and the dielectric layer, and forms a hardmask (silicon oxide hardmask, a silicon nitride hardmask, etc.) over the etch stop layer. Next, a photoresist is patterned above the hardmask, which allows the hardmask, the etch stop layer, the dielectric layer, and the lower conductor layer to be etched through the photoresist.Type: ApplicationFiled: June 4, 2004Publication date: December 8, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Douglas Coolbaugh, Ebenezer Eshun, Natalie Feilchenfeld, Michael Gautsch, Zhong-Xiang He, Matthew Moon, Vidhya Ramachandran, Barbara Waterhouse