Patents by Inventor Matthew S. Wong

Matthew S. Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145625
    Abstract: A device including an activated p-type layer comprising a III-Nitride based Mg-doped layer grown by vapor phase deposition or a growth method different from MBE. The p-type layer is activated through a sidewall of the p-type layer after the removal of defects from the sidewall thereby increasing a hole concentration in the p-type layer. In one or more examples, the device includes an active region between a first n-type layer and the p-type layer; a second n-type layer on the p-type layer; and a tunnel junction between the second n-type layer and the p-type layer, and the activated p-type layer has a hole concentration characterized by a current density of at least 100 Amps per centimeter square flowing between the first n-type layer and the second n-type layer in response to a voltage of 4 volts or less applied across the first n-type layer and the second n-type layer.
    Type: Application
    Filed: February 28, 2022
    Publication date: May 2, 2024
    Applicant: The Regents of the University of California
    Inventors: David Hwang, Matthew S. Wong, Shuji Nakamura
  • Publication number: 20240128400
    Abstract: Grow gallium-containing semi-conductor layers are grown on a substrate, wherein the gallium-containing semiconductor layers comprise AlxGayInzNvPwAsu, where 0?x?1, 0?y?1, 0?z?1, 0?v?1, 0?w?1, 0?u?1, v+w+u=1, and x+y+z=1. Dry etching of the gallium-containing semiconductor layers exposes sidewalls of the layers. Surface treatments are performed to recover from damage to the sidewalls resulting from the dry etching. Dielectric materials are deposited on the sidewalls, for example, by atomic layer deposition (ALD), to passivate the sidewalls. The resulting gallium-containing semiconductor layers have an improvement in optical efficiency as compared to gallium-containing semiconductor layers that are not subjected to the surface treatments and the deposition of the dielectric materials.
    Type: Application
    Filed: March 4, 2022
    Publication date: April 18, 2024
    Applicant: The Regents of the University of California
    Inventors: Steven P. DenBaars, Matthew S. Wong
  • Publication number: 20240078781
    Abstract: A method for determining a region for safe placement of a device in a medical image includes receiving a medical image, detecting at least one anatomic landmark in the medical image using at least one deep convolutional neural network, determining the region for safe placement of the device based on the detected at least one anatomic region using a semantic network, and displaying the region for safe placement of a device on the medical image using a display.
    Type: Application
    Filed: October 12, 2020
    Publication date: March 7, 2024
    Inventors: Matthew S. Brown, Dieter R. Enzmann, Koon-Pong Wong, Jonathan G. Goldin, Fereidoun Abtin, Morgan Daly, Liza Shrestha
  • Publication number: 20230420617
    Abstract: A nitride-based ultraviolet light emitting diode (UVLED) with an ultraviolet transparent contact (UVTC). The nitride-based UVLED is an alloy composition of (Ga, Al, In, B)N semiconductors, and the UVTC is composed of an oxide with a bandgap larger than that emitted in an active region of the nitride-based UVLED, wherein the oxide is an alloy composition of (Ga, Al, In, B, Mg, Fe, Si, Sn)O semiconductors, such as Ga2O3.
    Type: Application
    Filed: October 29, 2021
    Publication date: December 28, 2023
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Michael Iza, Matthew S. Wong, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20230197896
    Abstract: Gallium-containing semiconductor layers are grown on a substrate, followed by dry etching of the gallium-containing semiconductor layers during fabrication of a device. After the dry etching, surface treatments are performed to remove damage from the sidewalls of the device. After the surface treatments, dielectric materials are deposited on the sidewalls of the device to passivate the sidewalls of the device. These steps result in an improvement in forward current-voltage characteristics and reduction in leakage current of the device, as well as an enhancement of light output power and efficiency of the device.
    Type: Application
    Filed: October 30, 2020
    Publication date: June 22, 2023
    Applicant: The Regents of the University of California
    Inventors: Matthew S. Wong, Jordan M. Smith, Steven P. DenBaars
  • Publication number: 20220005980
    Abstract: Micro-scale light emitting diodes (micro-LEDs) with ultra-low leakage current results from a sidewall passivation method for the micro-LEDs using a chemical treatment followed by conformal dielectric deposition, which reduces or eliminates sidewall damage and surface recombination, and the passivated micro-LEDs can achieve higher efficiency than micro-LEDs without sidewall treatments. Moreover, the sidewall profile of micro-LEDs can be altered by varying the conditions of chemical treatment.
    Type: Application
    Filed: October 31, 2019
    Publication date: January 6, 2022
    Applicant: The Regents of the University of California
    Inventors: Tal Margalith, Matthew S. Wong, Lesley Chan, Steven P. DenBaars
  • Publication number: 20210193871
    Abstract: A reduction in leakage current and an increase in efficiency of III-nitride LEDs is obtained by sidewall passivation using atomic layer deposition of a dielectric. Atomic layer deposition is a hydrogen-free deposition method, which avoids problems associated with the effects of hydrogen on passivation and transparency.
    Type: Application
    Filed: October 31, 2018
    Publication date: June 24, 2021
    Applicant: The Regents of the University of California
    Inventors: Matthew S. Wong, David Hwang, Abdullah Alhassan, Steven P. DenBaars