Patents by Inventor Matthew W. Kelley

Matthew W. Kelley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11989009
    Abstract: Methods and systems to control stacked hexapod platforms for use as tools, which function with both high accuracy and high precision are provided. In some embodiments, the methods and systems include a convergence of modern control theory, and machine learning. Furthermore, some embodiments provide control algorithms to carry out autonomous in-space assembly operations using assemblers. Some embodiments provide methods and systems which combine long-reach low precision manipulators and smaller, high-precision assembler with interchangeable tools.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: May 21, 2024
    Assignee: United States of America as represented by the Administrator of NASA
    Inventors: James H. Neilan, II, Matthew K. Mahlin, John R. Cooper, Laura M. White, Benjamin N. Kelley, Matthew P Vaughan, Iok M. Wong, John W. Mulvaney, Erik E. Komendera, William D Chapin, Joshua N. Moser, Samantha H. G. Chapin
  • Patent number: 9354327
    Abstract: Radiation detection is disclosed. A radiation detection package includes a radio-photoluminescent glass (RPLG), an EMR source and a photodetector. The EMR source includes an input lead, and is configured to emit first energy in a predetermined band of EMR in a downstream direction toward the RPLG in response to receipt of an input signal on the input lead of the EMR source. The photodetector has an output lead, and is configured to detect second energy that is emitted by the RPLG in an emission band of EMR in response to the receipt of the first energy in the predetermined band of EMR, and generate a first output signal on the output lead indicative of an amount of the second energy.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: May 31, 2016
    Assignee: Lockheed Martin Corporation
    Inventors: David P. Summerlot, Matthew W. Kelley, Joseph M. Turchiano
  • Patent number: 9342722
    Abstract: Mechanisms for verification of an item. A controller reads out signals from an antenna array comprising a plurality of individual antenna elements that is configured to overlay an item that generates radio frequency (RF) emissions. The signals quantify the RF emissions received by antenna elements from the item. The controller generates an ad hoc RF emission signature based on the signals. A predetermined RF emission signature associated with the item is accessed. The ad hoc RF emission signature and the predetermined RF emission signature are compared to determine a verification status, and the controller performs a verification action based on the verification status.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: May 17, 2016
    Assignee: Lockheed Martin Corporation
    Inventors: David J. Lopez, Juan C. Fontana, David P. Summerlot, Joseph M. Turchiano, Matthew W. Kelley
  • Patent number: 7897503
    Abstract: A device having the capability for electrical, thermal, optical, and fluidic interconnections to various layers. Through-substrate vias in the interconnect device are filled to enable electrical and thermal connection or optionally hermetically sealed relative to other surfaces to enable fluidic or optical connection. Optionally, optical components may be placed within the via region in order to manipulate optical signals. Redistribution of electrical interconnection is accomplished on both top and bottom surfaces of the substrate of the interconnect chip.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: March 1, 2011
    Assignee: The Board of Trustees of the University of Arkansas
    Inventors: Ron B. Foster, Ajay P. Malshe, Matthew W. Kelley
  • Publication number: 20090212407
    Abstract: An infinitely stackable interconnect device and method having the capability for electrical, thermal, optical, and fluidic interconnections to various layers. Through-substrate vias in the interconnect device are filled to enable electrical and thermal connection or optionally hermetically sealed relative to other surfaces to enable fluidic or optical connection. Optionally, optical components may be placed within the via region in order to manipulate optical signals. Redistribution of electrical interconnection is accomplished on both top and bottom surfaces of the substrate of the interconnect chip.
    Type: Application
    Filed: May 12, 2006
    Publication date: August 27, 2009
    Inventors: Ron B. Foster, Ajay P. Malshe, Matthew W. Kelley