Abstract: The invention relates to a method for producing a shoe (1), in particular a sports shoe. In order to be able to produce the shoe economically and in the process to achieve a particularly good wearing comfort, the invention provides the steps of: a) Producing a shoe upper (2), wherein the shoe upper (2) has an upper region (3) that covers the upper region of the wearer's foot and a lower region (4) that encloses the sole of the wearer's foot; b) Producing a sole part (5), wherein the sole part (5) has a bottom region (6) and a lateral wall region (7), wherein the bottom region (6) and the wall region (7) delimit an upwardly open receiving space (8) for bulk material (9); c) Filling the receiving space (8) with a bulk material (9), wherein the bulk material consists at least in part, preferably entirely, of a thermoplastic elastomer (TPE); d) Fastening the shoe upper (2) to the sole part (5) such that the lower region (4) of the shoe upper (2) comes to rest on the bulk material (9).

Abstract: An article of footwear is provided that includes a sole structure and an upper attached to the sole structure. The upper includes an exterior layer and a base layer, and the exterior layer includes a biodegradable layer and a biologically active agent capable of biodegrading the biodegradable layer.

Abstract: The present disclosure relates to a memory hierarchy for a system-in-package. An example memory hierarchy is connectable to a processor via a memory management unit arranged for translating a virtual address sent by the processor into a physical address. The memory hierarchy has a data cache memory and a memory structure having at least a L1 memory array comprising at least one cluster. The memory structure comprises a first data access controller arranged for managing one or more banks of scratchpad memory of at least one of the clusters of at least the L1 memory array, comprising a data port for receiving at least one physical address and arranged for checking at run-time, for each received physical address, bits of the physical address to see if the physical address is present in the one or more banks of the at least one cluster of at least the L1 memory array.