Patents by Inventor Matthias Schreiber

Matthias Schreiber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983126
    Abstract: An electronic component is formed by a semiconductor component or a semiconductor-like structure having gate electrode assemblies, for reading out the quantum state of a qubit in a quantum dot. The electronic component comprises a substrate having a two-dimensional electron gas or electron hole gas. Electrical contacts connect the gate electrode assemblies to voltage sources. The gate electrode assemblies have gate electrodes, which are arranged on a surface of the electronic component, for producing potential wells in the substrate.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: May 14, 2024
    Assignees: Rheinisch-Westfälische Technische Hochschule (RWTH) Aachen, Forschungszentrum Jülich GmbH
    Inventors: Matthias Künne, Hendrik Bluhm, Lars Schreiber
  • Patent number: 11694759
    Abstract: A method for the secured storing of a data element of a predefined data type to be stored by a computer program in an external memory, which is connected to a microcontroller, an error correction value of one error correction value data type being used. The method includes, when creating the computer program: defining a composite data element that includes one element of the data type and one element of the error correction value data type, in the computer program; and when executing the computer program: calculating the error correction value for the data element to be stored; forming an error correction data element as the composite data element, which contains the data element to be stored and the associated error correction value, which has been calculated for the data element; and writing the error correction data element to a memory address for the error correction data element.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: July 4, 2023
    Assignee: ROBERT BOSCH GMBH
    Inventors: Martin Assel, Axel Aue, Matthias Schreiber
  • Publication number: 20230121675
    Abstract: A method for controlling a technical system, in particular of a motor vehicle.
    Type: Application
    Filed: April 12, 2021
    Publication date: April 20, 2023
    Inventors: Andreas Merker, Axel Aue, Franz Nottensteiner, Jerome Parlebas, Matthias Schreiber
  • Patent number: 11573857
    Abstract: A method for the secured storing of a data element in an external memory, which is connected to a microcontroller via an interface module, which is configured to calculate memory addresses for data to be stored and for error correction values. The method includes receiving the data element to be stored by the interface module, a calculation by the interface module of a memory address in the external memory for the data element to be stored, and a writing, starting at the memory address, of the data element and of the error correction value via the interface module into the external memory, the error correction value immediately following the data element being written and the writing taking place within one addressing phase. A corresponding interface module, a corresponding microcontroller, and a corresponding control unit are also described.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: February 7, 2023
    Assignee: Robert Bosch GmbH
    Inventors: Martin Assel, Axel Aue, Matthias Schreiber
  • Patent number: 11561857
    Abstract: A method for the secured storing of a data element to be stored by a computer program in an external memory, which is connected to a microcontroller, the microcontroller including an interface module, which is configured to calculate error correction values for data elements including, when creating the computer program, during a determination of memory addresses of the computer program, determining a memory address in the external memory for the data element, a shared memory space requirement of data element and associated error correction value being taken into account; and during execution of the computer program, receiving the data element by the interface module; calculating an error correction value for the data element by the interface module; and writing, starting at the memory address, the data element and immediately thereafter the calculated error correction value within one addressing phase by the interface module.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: January 24, 2023
    Assignee: Robert Bosch GmbH
    Inventors: Martin Assel, Axel Aue, Matthias Schreiber
  • Patent number: 11461159
    Abstract: An integrated circuit. The circuit includes a communication module including shared ports, and an error management module for managing at least one case of an error. The circuit is configured to communicate on multiple internal communication channels via the ports. The error management module includes at least one hardware path for selectively switching off the individual communication channels in the case of an error.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: October 4, 2022
    Assignee: Robert Bosch GmbH
    Inventors: Eugen Becker, Axel Aue, Matthias Schreiber
  • Publication number: 20220269525
    Abstract: A method for operating a microcontroller. The microcontroller includes a plurality of resources, a plurality of virtual machines being executed in the microcontroller, a coordination unit being superordinate to the plurality of virtual machines. Access information concerning accesses of the plurality of virtual machines to the plurality of resources is stored in the coordination unit. In the event that one of the virtual machines requests a reset of one of the resources, the coordination unit checks on the basis of the access information, which of the virtual machines are accessing this resource. The coordination unit determines on the basis of this check, whether the resource will be reset or whether a substitute measure will be taken.
    Type: Application
    Filed: February 17, 2022
    Publication date: August 25, 2022
    Inventors: Georg Kuehberger, Bernhard Plametzberger, Dirk Lentz, Matthias Knauss, Matthias Schreiber, Philipp Stark
  • Publication number: 20220027237
    Abstract: A method for the secured storing of a data element in an external memory, which is connected to a microcontroller via an interface module, which is configured to calculate memory addresses for data to be stored and for error correction values. The method includes receiving the data element to be stored by the interface module, a calculation by the interface module of a memory address in the external memory for the data element to be stored, and a writing, starting at the memory address, of the data element and of the error correction value via the interface module into the external memory, the error correction value immediately following the data element being written and the writing taking place within one addressing phase. A corresponding interface module, a corresponding microcontroller, and a corresponding control unit are also described.
    Type: Application
    Filed: May 11, 2021
    Publication date: January 27, 2022
    Inventors: Martin Assel, Axel Aue, Matthias Schreiber
  • Publication number: 20220027238
    Abstract: A method for the secured storing of a data element to be stored by a computer program in an external memory, which is connected to a microcontroller, the microcontroller including an interface module, which is configured to calculate error correction values for data elements including, when creating the computer program, during a determination of memory addresses of the computer program, determining a memory address in the external memory for the data element, a shared memory space requirement of data element and associated error correction value being taken into account; and during execution of the computer program, receiving the data element by the interface module; calculating an error correction value for the data element by the interface module; and writing, starting at the memory address, the data element and immediately thereafter the calculated error correction value within one addressing phase by the interface module.
    Type: Application
    Filed: May 11, 2021
    Publication date: January 27, 2022
    Inventors: Martin Assel, Axel Aue, Matthias Schreiber
  • Publication number: 20220028474
    Abstract: A method for the secured storing of a data element of a predefined data type to be stored by a computer program in an external memory, which is connected to a microcontroller, an error correction value of one error correction value data type being used. The method includes, when creating the computer program: defining a composite data element that includes one element of the data type and one element of the error correction value data type, in the computer program; and when executing the computer program: calculating the error correction value for the data element to be stored; forming an error correction data element as the composite data element, which contains the data element to be stored and the associated error correction value, which has been calculated for the data element; and writing the error correction data element to a memory address for the error correction data element.
    Type: Application
    Filed: May 12, 2021
    Publication date: January 27, 2022
    Inventors: Martin Assel, Axel Aue, Matthias Schreiber
  • Patent number: 11200195
    Abstract: A method for the initial programming of a secondary computer. The method includes configuring a serial interprocessor interface between the secondary computer and a main computer, and data are written via the interface to a flash memory of the secondary computer.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: December 14, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Eugen Becker, Matthias Schreiber, Axel Aue
  • Publication number: 20210294689
    Abstract: An integrated circuit. The circuit includes a communication module including shared ports, and an error management module for managing at least one case of an error. The circuit is configured to communicate on multiple internal communication channels via the ports. The error management module includes at least one hardware path for selectively switching off the individual communication channels in the case of an error.
    Type: Application
    Filed: January 28, 2021
    Publication date: September 23, 2021
    Inventors: Eugen Becker, Axel Aue, Matthias Schreiber
  • Patent number: 10990381
    Abstract: A method updating a program in a flash memory includes executing a first image of the program while an address space of the program is imaged onto the memory blocks, which are operated in a single-level mode; copying part of the first image from a range within the address space, which is imaged onto one of the blocks, into a backup block; setting the one of the blocks to a multi-level mode; while the address range is imaged onto the backup block, programming the one of the blocks with part of the second image besides for the part of the first image; switching the address range back to the block while the block remains in the multi-level mode; as long as the second image is incomplete, repeating the copying, programming, and switching with further parts of the second image; and subsequently executing the second image instead of the first image.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: April 27, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Axel Aue, Hans-Walter Schmitt, Matthias Schreiber
  • Patent number: 10821958
    Abstract: A computation unit having at least one computation core, a primary memory device, and at least one main connecting unit for connecting the at least one computation core to the primary memory device, the computation unit having at least two functional units, at least a first functional unit of the at least two functional units being embodied a) to receive first data from at least one further functional unit of the at least two functional units, and/or b) to transmit second data to at least one further functional unit of the at least two functional units.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: November 3, 2020
    Assignee: Robert Bosch GmbH
    Inventors: Matthias Schreiber, Axel Aue, Nico Bannow
  • Publication number: 20200226092
    Abstract: A method (10) for the initial programming of a secondary computer (22), characterized by the following features: —a serial interprocessor interface (21) between the secondary computer (22) and a main computer (23) is configured, and —the data (24) are written (12) via the interface (21) to a flash memory (25) of the secondary computer (22).
    Type: Application
    Filed: June 11, 2018
    Publication date: July 16, 2020
    Inventors: Eugen Becker, Matthias Schreiber, Axel Aue
  • Publication number: 20200026509
    Abstract: A method updating a program in a flash memory includes executing a first image of the program while an address space of the program is imaged onto the memory blocks, which are operated in a single-level mode; copying part of the first image from a range within the address space, which is imaged onto one of the blocks, into a backup block; setting the one of the blocks to a multi-level mode; while the address range is imaged onto the backup block, programming the one of the blocks with part of the second image besides for the part of the first image; switching the address range back to the block while the block remains in the multi-level mode; as long as the second image is incomplete, repeating the copying, programming, and switching with further parts of the second image; and subsequently executing the second image instead of the first image.
    Type: Application
    Filed: March 6, 2018
    Publication date: January 23, 2020
    Inventors: Axel Aue, Hans-Walter Schmitt, Matthias Schreiber
  • Patent number: 10353730
    Abstract: The present invention relates to a method for running a virtual machine on a destination host node in a computer cluster, comprising the steps of requesting (S101) a set of target configuration parameters assigned to the virtual machine, wherein the target configuration parameters have prioritizations; requesting (S102) a set of actual configuration parameters of the destination host node for checking against the requested set of target configuration parameters; and running (S103) the virtual machine on the destination host node, if the set of actual configuration parameters of the destination host node falls within the set of target configuration parameters, wherein when selecting destination host node, the prioritization of the target configuration parameters is considered.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: July 16, 2019
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Manuel Buil, Claudia Mayntz, Matthias Schreiber, Marc Vorwerk
  • Patent number: 10155312
    Abstract: A method for determining values influencing movement of a robot is disclosed. The method includes the following steps: a) provision of a task to be performed by the robot and a worker; b) provision of a layout of a workstation; c) provision of tool data; d) determination of respective axial movement patterns of the robot on the basis of steps a) to c); e) provision of a worker workspace; f) determination of critical path points of the robot, where a specified movement speed is exceeded by the robot and/or a specified mass of an element to be moved by the robot is exceeded, on the basis of the axial movement patterns and the workspace; g) simulation of respective collisions at the critical path points by a second robot; and h) determination of permissible operating speeds of the robot for each critical path point on the basis of the simulated collisions.
    Type: Grant
    Filed: May 9, 2015
    Date of Patent: December 18, 2018
    Assignee: Daimler AG
    Inventors: Anton Feldmann, Alexander Guertler, Simon Klumpp, Willi Klumpp, Matthias Reichenbach, Matthias Schreiber, Michael Zuern
  • Publication number: 20180354487
    Abstract: A computation unit having at least one computation core, a primary memory device, and at least one main connecting unit for connecting the at least one computation core to the primary memory device, the computation unit having at least two functional units, at least a first functional unit of the at least two functional units being embodied a) to receive first data from at least one further functional unit of the at least two functional units, and/or b) to transmit second data to at least one further functional unit of the at least two functional units.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 13, 2018
    Inventors: Matthias Schreiber, Axel Aue, Nico Bannow
  • Patent number: 10146248
    Abstract: A model calculation unit for calculating a data-based function model in a control unit is provided, the model calculation unit having a processor core which includes: a multiplication unit for carrying out a multiplication on the hardware side; an addition unit for carrying out an addition on the hardware side; an exponential function unit for calculating an exponential function on the hardware side; a memory in the form of a configuration register for storing hyperparameters and node data of the data-based function model to be calculated; and a logic circuit for controlling, on the hardware side, the calculation sequence in the multiplication unit, the addition unit, the exponential function unit and the memory in order to ascertain the data-based function model.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: December 4, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventors: Tobias Lang, Heiner Markert, Axel Aue, Wolfgang Fischer, Ulrich Schulmeister, Nico Bannow, Felix Streichert, Andre Guntoro, Christian Fleck, Anne Von Vietinghoff, Michael Saetzler, Michael Hanselmann, Matthias Schreiber