Abstract: A sensor comprises a housing; and a lead frame comprising at least three elongated leads having an exterior portion extending from the housing; and a magnetic sensor circuit disposed in the housing and connected to the lead frame. The housing comprising at least two recesses or at least two lateral protrusions arranged on two opposite sides of the housing, for allowing the sensor to be mounted to the support. A component assembly comprising said sensor mounted on a support, the support comprising a plurality of first and second posts and a plurality of electrical contacts. A method of producing said component assembly, comprising the step of arranging said sensor with its elongated leads adjacent the first posts, and arranging its lateral protrusions and/or lateral recesses adjacent the second posts, and connecting the elongated leads to the electrical contacts.

Abstract: A sensor comprises a housing; and a lead frame comprising at least three elongated leads having an exterior portion extending from the housing; and a magnetic sensor circuit disposed in the housing and connected to the lead frame. The housing comprising at least two recesses or at least two lateral protrusions arranged on two opposite sides of the housing, for allowing the sensor to be mounted to the support. A component assembly comprising said sensor mounted on a support, the support comprising a plurality of first and second posts and a plurality of electrical contacts. A method of producing said component assembly, comprising the step of arranging said sensor with its elongated leads adjacent the first posts, and arranging its lateral protrusions and/or lateral recesses adjacent the second posts, and connecting the elongated leads to the electrical contacts.

Abstract: An integrated circuit is provided that includes an output stage circuit. The output stage circuit includes an input node for receiving a digital input signal, a supply voltage node for receiving a supply voltage signal, a digital to analog convertor for converting the digital signal, an amplifier for amplifying the converted signal, a first/second and optionally third voltage regulator generating a first/second and optionally third voltage signal, and a greatest-voltage selector circuit for providing power to the amplifier. Two different voltages are provided to the DAC. The output signal can be a SENT signal. The circuit is highly robust against power-interruptions and EMI.

Abstract: An integrated circuit comprising an output stage circuit. The output stage circuit comprises: an input node for receiving a digital input signal; a supply voltage node for receiving a supply voltage signal; a digital to analog convertor for converting the digital signal; an amplifier for amplifying the converted signal; a first/second and optionally third voltage regulator generating a first/second and optionally third voltage signal; a greatest-voltage selector circuit for providing power to the amplifier. Two different voltages are provided to the DAC. The output signal can be a SENT signal. The circuit is highly robust against power-interruptions and EMI.

Abstract: A power consumption metering device for a vehicle that utilizes electrical energy from an external source has a power metering circuit coupled to a main power cable between a power charging port and an energy store of the vehicle to measure voltage and current from the external source, a communications module for data communication, and a controller coupled to the power metering circuit and the communication module having a processor and a memory. The memory stores instructions that cause the controller to obtain a measurement of the voltage and current integrated over time to determine data for an amount of energy consumed during power charging, store the data for the amount of energy consumed in the memory, establish a communication link with a tax assessment application executing on a client device, and transfer the data for the amount of energy consumed to the tax assessment application.

Abstract: A differential line driver circuit comprising a plurality of driver stages is described. Each driver stage is operably coupled to at least one output of the line driver circuit and arranged to receive at least one control signal and to drive at least one output signal on the at least one output of the line driver circuit in accordance with the at least one control signal received thereby. The line driver circuit further comprises at least one delay component arranged to receive the at least one control signal, and to sequentially propagate the at least one control signal to the driver stages with time delays between the propagation of the at least one control signal to sequentially adjacent driver stages.

Abstract: An electrostatic discharge (ESD) protection circuit for protecting one or more devices in an electronic circuit from an ESD current which enters the electronic circuit through one or more input/output pins, the protection circuit comprising: a voltage clamp circuit connectable to the or each pin, for diverting the ESD current from the or each device; and a current sensor circuit connected between the input/output pins and the voltage clamp circuit and connected to the one or more devices, the current sensor circuit for sensing the ESD current and for switching off the or each device when the sensed current exceeds a threshold value, wherein when a current flows in the current mirror circuits above a threshold value the device is caused to switch off.

Abstract: A differential line driver circuit comprising a plurality of driver stages is described. Each driver stage is operably coupled to at least one output of the line driver circuit and arranged to receive at least one control signal and to drive at least one output signal on the at least one output of the line driver circuit in accordance with the at least one control signal received thereby. The line driver circuit further comprises at least one delay component arranged to receive the at least one control signal, and to sequentially propagate the at least one control signal to the driver stages with time delays between the propagation of the at least one control signal to sequentially adjacent driver stages.

Abstract: A buffer apparatus for a communications bus comprises a driver circuit having an output. An amplifier circuit having an input is coupled to the output of the driver circuit. The driver circuit is arranged to generate, when in use, a drive signal having a waveform that comprises a step therein so as to substantially suppress generation by the amplifier circuit of a portion of an oscillation of an output signal.

Abstract: A buffer apparatus for a communications bus comprises a driver circuit having an output. An amplifier circuit having an input is coupled to the output of the driver circuit. The driver circuit is arranged to generate, when in use, a drive signal having a waveform that comprises a step therein so as to substantially suppress generation by the amplifier circuit of a portion of an oscillation of an output signal.

Abstract: An electrostatic discharge (ESD) protection circuit for protecting one or more devices in an electronic circuit from an ESD current which enters the electronic circuit through one or more input/output pins, the protection circuit comprising: a voltage clamp circuit connectable to the or each pin, for diverting the ESD current from the or each device; and a current sensor circuit connected between the input/output pins and the voltage clamp circuit and connected to the one or more devices, the current sensor circuit for sensing the ESD current and for switching off the or each device when the sensed current exceeds a threshold value, wherein when a current flows in the current mirror circuits above a threshold value the device is caused to switch off.

Abstract: The UHF transponder includes protection against electrostatic discharge (ESD) formed by the modulation transistor (T1) and additional control means (20) for said transistor which fulfils two functions: its first response signal modulation function and an additional ESD protection function.

Abstract: The invention includes a power amplifier with an amplifier core including parallel amplifier cells, a replica cell made of one amplifier cell similar to those of the amplifier core, a power controller to select a combination of amplifier cells to activate, a regulator to fix the top voltage of the replica cell to a reference voltage, a voltage generator to provide the voltage reference to the regulator, a current generator to provide a reference current through the replica cell, and a drive unit controlled by the regulator output to drive the combination of amplifier cells, so that each selected combination of activated cells defines a predetermined attenuation level of power amplifier output signal so that it is attenuated in a stepwise manner.

Abstract: The passive transponder comprises an antenna (2) connected to an integrated circuit (6) the analogue part of which includes a passive voltage rectifier (8) supplying a rectified voltage (VDC1) and an active multiplier or booster (16) for said rectified voltage which is formed by a capacitor (C2) switched to a relatively low frequency, for example 1 MHz, by means of switches formed by transistors (18 to 21) controlled using an oscillator (24).

Abstract: The invention includes a power amplifier with an amplifier core including parallel amplifier cells, a replica cell made of one amplifier cell similar to those of the amplifier core, a power controller to select a combination of amplifier cells to activate, a regulator to fix the top voltage of the replica cell to a reference voltage, a voltage generator to provide the voltage reference to the regulator, a current generator to provide a reference current through the replica cell, and a drive unit controlled by the regulator output to drive the combination of amplifier cells, so that each selected combination of activated cells defines a predetermined attenuation level of power amplifier output signal so that it is attenuated in a stepwise manner.

Abstract: The present invention provides an integrated circuit (1) having at least one on-chip silicide-based CMOS Schottky diode (10) comprising a silicon layer forming a substrate (16) in which is formed an implant guard ring (24) between an active Schottky area (28) and a cathode contact area (19), having a silicide layer (26) which forms the active Schottky area (28) and which covers the guard ring (24), characterized in that the silicon substrate (16) comprises a MOS-gate ring (34) between the guard ring (24) and the active Schottky area (28) in order to provide an insulation element between the guard ring (24) and the active Schottky area (28). The invention provides also a transponder comprising such an integrated circuit (1) and a method for fabricating the Schottky diode (10).

Abstract: The UHF transponder includes protection against electrostatic discharge (ESD) formed by the modulation transistor (T1) and additional control means (20) for said transistor which fulfills two functions: its first response signal modulation function and an additional ESD protection function.

Abstract: The passive transponder comprises an antenna (2) connected to an integrated circuit (6) the analogue part of which includes a passive voltage rectifier (8) supplying a rectified voltage (VDC1) and an active multiplier or booster (16) for said rectified voltage which is formed by a capacitor (C2) switched to a relatively low frequency, for example 1 MHz, by means of switches formed by transistors (18 to 21) controlled using an oscillator (24).

Abstract: Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.

Abstract: Radio receivers for frequency-modulated signals and more particularly, in such receivers, to a device for the demodulation of a signal modulated at intermediate frequency f.sub.i. The signal F.sub.M that is frequency modulated around a frequency f.sub.i is applied, after conversion into a square-wave signal F.sub.MR, to a delay line with shift registers that is controlled by the signals provided by an oscillator. Each of the three cascade-connected sections of the delay line introduces a delay 1/4f.sub.i and the output signals of each section are applied to EXCLUSIVE OR circuits that respectively give a demodulated signal F.sub.R1, a signal F.sub.R2 for the suppression of a demodulated signal and a signal F.sub.R3 to control the frequency of the oscillator.