Patents by Inventor Maurice Gleeson

Maurice Gleeson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8077714
    Abstract: Multicast packets that are received on a port of a network device and forwarded to multiple output ports are stored in memory and respective primary control entries which define them are converted to secondary control entries defining multiple unicast packets before a scheduling algorithm is applied. The packets are reconstituted after the application of the scheduling algorithm has been applied to the control entries. For VPLS packets that are received on a single port and replicated multiple times on one or more output ports, a replication database may be used in conjunction with a replication engine to convert the control entry for a received packet into multiple control entries defining unicast packets for each of the destination ports before the scheduling algorithm is applied. This method is applicable to the replication of packets onto a Virtual Private LAN.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: December 13, 2011
    Assignee: Broadcom Corporation
    Inventors: Con Cremin, Maurice Gleeson, Jennifer Hamilton, Niall Hanrahan, Micheal Lardner, Sorcha Callaghan, Anne G O'Connell, Eugene G O'Neill
  • Publication number: 20100040060
    Abstract: According to one general aspect, an apparatus may include a plurality of ports, a port forwarding processor, and a queue controller. In some embodiments, the plurality of ports may be configured to receive and forward packets within a communications network. In various embodiments, the port forwarding processor may be configured to determine a destination port associated with a received packet. In one embodiment, the queue controller may be configured to define at least one emulated local area network (ELAN) via a respective service member set that identifies which ports are members of the service member set, determine whether or not the destination port is a permitted member of the service member set, and, if the destination port associated with the received packet is not a permitted member of the service member set, flood the received packet to the permitted members of the service member set.
    Type: Application
    Filed: July 10, 2009
    Publication date: February 18, 2010
    Applicant: Broadcom Corporation
    Inventor: Maurice Gleeson
  • Publication number: 20080253370
    Abstract: Multicast packets that are received on a port of a network device and forwarded to multiple output ports are stored in memory and respective primary control entries which define them are converted to secondary control entries defining multiple unicast packets before a scheduling algorithm is applied. The packets are reconstituted after the application of the scheduling algorithm has been applied to the control entries. For VPLS packets that are received on a single port and replicated multiple times on one or more output ports, a replication database may be used in conjunction with a replication engine to convert the control entry for a received packet into multiple control entries defining unicast packets for each of the destination ports before the scheduling algorithm is applied. This method is applicable to the replication of packets onto a Virtual Private LAN.
    Type: Application
    Filed: February 21, 2008
    Publication date: October 16, 2008
    Inventors: Con Cremin, Maurice Gleeson, Jennifer Hamilton, Niall Hanrahan, Michael Lardner, Sorcha Callaghan, Anne G. O'Connell, Eugene G. O'Neill
  • Publication number: 20030088726
    Abstract: The serial scaleable bandwidth interconnect (SBI336S) bus provides a 777.6 MHz point-to-point LVDS serial interface that supports a variety of traffic types including support for Fractional links. 8B/10B coding is used on the serial link to provide codes to transmit additional control information across the serial interface. The SBI336S bus encodes ADD BUS clock master timing from the PHY device to the Link Layer device over the DROP BUS. The SBI336S bus can also provide an in-band communication channel between devices.
    Type: Application
    Filed: January 31, 2002
    Publication date: May 8, 2003
    Inventors: Jeff D. Dillabough, Kevin Tymchuk, Maurice Gleeson, Gordon R. Oliver