Patents by Inventor Maurilio Cometto

Maurilio Cometto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110153780
    Abstract: Disclosed are methods and apparatus for facilitating transmission of file access type messages over a Fibre Channel (FC) network. In one embodiment, at a file interposed access protocol layer of a file access client, a file access type operation is received from a file access type layer at the client device. The interposed layer may be interposed between an upper file access layer and an FC layer. The file access type operation specifies a request pertaining to file access. At the interposed file access protocol layer of the client, the file access type operation is modified into one or more sequence of operations so that the operations can be transmitted over an FC network. A sequence of operations are transmitted to an file access server over the FC network.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 23, 2011
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Raghavendra J. Rao, Maurilio Cometto
  • Patent number: 7930494
    Abstract: Techniques are provided for performing multi-pass erase. An erase command is received at a storage area network (SAN) switch in a storage area network. The erase command is associated with a block of data on a target device. A virtual initiator is determined for performing the erase command on the block of data. Multiple bit patterns are generated using a multi-pass erase algorithm. The multiple bit patterns are generated for writing over the block of data on the target device. Repeated writes are performed over the block of data using the bit patterns. The block of data is repeatedly overwritten to remove remanence of the block of data on the target device.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: April 19, 2011
    Assignee: Cisco Technology, Inc.
    Inventors: Muhammad Asim Goheer, Maurilio Cometto, Prashant Billore
  • Patent number: 7882283
    Abstract: Support for virtualization in a storage area networks may be provided using a variety of techniques. In one embodiment of the present invention, exchange level load balancing may be provided by determining if input/outputs (IOs) received by a device are new. If a particular IO is new, the IO may be assigned to a particular data path processor and an context may be created corresponding to the IO and to the processor. Then, when an event corresponding to the IO is received, the event may be forwarded to the processor assigned to the IO.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: February 1, 2011
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Jeevan Kamisetty, Arindam Paul, Hua Zhong, Varagur V. Chandrasekaran
  • Publication number: 20100312936
    Abstract: In one embodiment, a solution is provided wherein a lock client sends lock requests to a lock manager upon receipt of an input/output (I/O) and receives back a lock grant. At some point later, the lock client may send a lock release. The lock manager, upon receipt of a lock release from a lock client, remove a first lock request corresponding to the lock release from a lock grant queue corresponding to the lock manager. Then, for each dependency queue lock request in a dependency queue corresponding to the first lock request, the lock manager may determine whether the dependency queue lock request conflicts with a second lock request in the lock grant queue, and then may process the dependency queue lock request according to whether the dependency queue lock requires conflicts with a second lock request in the lock grant queue.
    Type: Application
    Filed: July 22, 2010
    Publication date: December 9, 2010
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Maurilio Cometto, Arindam Paul, Varagur V. Chandrasekaran
  • Patent number: 7844784
    Abstract: In one embodiment, a solution is provided wherein a lock manager is kept moving among multiple cores or processors in a multi-core or multi-processor environment. By “hopping” the lock manager from processor to processor, a bottleneck at any of the processors is prevented. The frequency of movement may be based on, for example, a counter that counts the number of input/outputs handled by the lock manager and moves the lock manager to a different processor once a determined threshold is met. In another embodiment of the present invention, the frequency of the movement between processors may be based on a time that counts the amount of time the lock manager has been operating on the processor and moves the lock manager to a different processor once a predetermined time is reached.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: November 30, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Jeevan Kamisetty, Arindam Paul, Varagur V. Chandrasekaran
  • Patent number: 7830809
    Abstract: A fibre channel frame is received at a first fibre channel switch. The fibre channel frame includes time stamp information associated with fibre channel switches between a second fibre channel switch and the first fibre channel switch. A time-to-live (TTL) value included in the fibre channel frame is determined. The fibre channel frame is sent back to the second fibre channel switch upon determining the TTL value included in the fibre channel frame.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: November 9, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Thomas James Edsall
  • Patent number: 7827251
    Abstract: In one embodiment, a method is provided comprising: receiving, at a virtualizer, a write command from an initiator in a storage area network, wherein the storage area network includes the initiator and a plurality of mirrored storages; sending, from the virtualizer, a write command to the plurality of mirrored storages; receiving, at the virtualizer, a transfer ready message from a first of the plurality of mirrored storages; sending a transfer ready message from the virtualizer to the initiator in response to the receiving of the transfer ready message from the first of the plurality of mirrored storages; receiving, at the virtualizer, a data message from the initiator; and sending, from the virtualizer, a data message to the plurality of mirrored storage once transfer ready messages have been received from each of the plurality of mirrored storages.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: November 2, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Jeevan Kamisetty, Maurilio Cometto
  • Patent number: 7783805
    Abstract: In one embodiment, a solution is provided wherein a lock client sends lock requests to a lock manager upon receipt of an input/output (I/O) and receives back a lock grant. At some point later, the lock client may send a lock release. The lock manager, upon receipt of a lock release from a lock client, remove a first lock request corresponding to the lock release from a lock grant queue corresponding to the lock manager. Then, for each dependency queue lock request in a dependency queue corresponding to the first lock request, the lock manager may determine whether the dependency queue lock request conflicts with a second lock request in the lock grant queue, and then may process the dependency queue lock request according to whether the dependency queue lock requires conflicts with a second lock request in the lock grant queue.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: August 24, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Arindam Paul, Varagur V. Chandrasekaran
  • Patent number: 7707371
    Abstract: Techniques are provided for performing multi-pass erase. An erase command is received at a storage area network (SAN) switch in a storage area network. The erase command is associated with a block of data on a target device. A virtual initiator is determined for performing the erase command on the block of data. Multiple bit patterns are generated using a multi-pass erase algorithm. The multiple bit patterns are generated for writing over the block of data on the target device. Repeated writes are performed over the block of data using the bit patterns. The block of data is repeatedly overwritten to remove remanence of the block of data on the target device.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: April 27, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Muhammad Asim Goheer, Maurilio Cometto, Prashant Billore
  • Patent number: 7596627
    Abstract: Methods and apparatus are provided for controlling congestion in a network such as a fibre channel network. Techniques are provided for characterizing traffic flow at a congested network node. The congested network node can generate various instructions such as quench messages to control traffic flow towards the congested network node. The quench messages can optionally include information about the characteristics of the congestion. The instructions are distributed to other nodes in the network. The other network nodes can interpret the instructions and control traffic flow towards the congested node.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: September 29, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Guglielmo M. Morandin, Raymond J. Kloth, Robert L. Hoffman
  • Patent number: 7406034
    Abstract: Methods and apparatus are provided for improving fibre channel frame delivery. Techniques are provided for the in order delivery of frames by intelligently delaying or dropping selected fibre channel frames. Other techniques are provided for in order delivery by using label switching and frame labels. The various techniques can be applied during circumstances such as a link state or channel change.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: July 29, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Scott S. Lee
  • Publication number: 20080175160
    Abstract: In one embodiment, a solution is provided wherein a minimum and/or maximum bandwidth may be guaranteed for specific flows. These guarantees can be associated to various levels of granularity, such as target (T), target-Logical Unit Number (LUN) coupling (TL), initiator-target-LUN coupling (ITL), and initiator-target coupling (IT). This may be accomplished by rate limiting frames in the storage area network based upon quality of service information provided by a user. As such, the traffic can be shaped in a way that guarantees requested levels of service without dropping frames.
    Type: Application
    Filed: January 22, 2007
    Publication date: July 24, 2008
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Maurilio Cometto, Jeevan Kamisetty, Arindam Paul, Varagur V. Chandrasekaran
  • Publication number: 20080126726
    Abstract: In one embodiment, a solution is provided wherein a lock manager is kept moving among multiple cores or processors in a multi-core or multi-processor environment. By “hopping” the lock manager from processor to processor, a bottleneck at any of the processors is prevented. The frequency of movement may be based on, for example, a counter that counts the number of input/outputs handled by the lock manager and moves the lock manager to a different processor once a determined threshold is met. In another embodiment of the present invention, the frequency of the movement between processors may be based on a time that counts the amount of time the lock manager has been operating on the processor and moves the lock manager to a different processor once a predetermined time is reached.
    Type: Application
    Filed: November 27, 2006
    Publication date: May 29, 2008
    Applicant: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Jeevan Kamisetty, Arindam Paul, Varagur V. Chandrasekaran
  • Publication number: 20080126693
    Abstract: Support for virtualization in a storage area networks may be provided using a variety of techniques. In one embodiment of the present invention, exchange level load balancing may be provided by determining if input/outputs (IOs) received by a device are new. If a particular IO is new, the IO may be assigned to a particular data path processor and an context may be created corresponding to the IO and to the processor. Then, when an event corresponding to the IO is received, the event may be forwarded to the processor assigned to the IO.
    Type: Application
    Filed: November 28, 2006
    Publication date: May 29, 2008
    Applicant: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Jeevan Kamisetty, Arindam Paul, Hua Zhong, Varagur V. Chandrasekaran
  • Publication number: 20080126647
    Abstract: In one embodiment, a solution is provided wherein a lock client sends lock requests to a lock manager upon receipt of an input/output (I/O) and receives back a lock grant. At some point later, the lock client may send a lock release. The lock manager, upon receipt of a lock release from a lock client, remove a first lock request corresponding to the lock release from a lock grant queue corresponding to the lock manager. Then, for each dependency queue lock request in a dependency queue corresponding to the first lock request, the lock manager may determine whether the dependency queue lock request conflicts with a second lock request in the lock grant queue, and then may process the dependency queue lock request according to whether the dependency queue lock requires conflicts with a second lock request in the lock grant queue.
    Type: Application
    Filed: November 29, 2006
    Publication date: May 29, 2008
    Applicant: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Arindam Paul, Varagur V. Chandrasekaran
  • Publication number: 20080127198
    Abstract: Fine granularity exchange level load balancing may be performed in a device in a storage area network in order to ensure that processors in a multi-core environment are not overloaded. This may be accomplished by assigning input/outputs relating to a particular exchange to a specific processor, and maintaining that association so that subsequent related input/outputs are handled by the same processor. In this process, the system may first determine if a received IO is new. If so, then it may assign the IO to a particular data path processor and create a context corresponding to the IO and the processor, as well as to the type of the non-command frame. Subsequently, an event may be received corresponding to the IO, which may then be forwarded to the processor assigned to the IO.
    Type: Application
    Filed: November 28, 2006
    Publication date: May 29, 2008
    Applicant: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Jeevan Kamisetty, Arindam Paul, Varagur V. Chandrasekaran
  • Publication number: 20080104321
    Abstract: In one embodiment, a method is provided comprising: receiving, at a virtualizer, a write command from an initiator in a storage area network, wherein the storage area network includes the initiator and a plurality of mirrored storages; sending, from the virtualizer, a write command to the plurality of mirrored storages; receiving, at the virtualizer, a transfer ready message from a first of the plurality of mirrored storages; sending a transfer ready message from the virtualizer to the initiator in response to the receiving of the transfer ready message from the first of the plurality of mirrored storages; receiving, at the virtualizer, a data message from the initiator; and sending, from the virtualizer, a data message to the plurality of mirrored storage once transfer ready messages have been received from each of the plurality of mirrored storages.
    Type: Application
    Filed: October 8, 2007
    Publication date: May 1, 2008
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Jeevan Kamisetty, Maurilio Cometto
  • Patent number: 7324441
    Abstract: Methods and apparatus are provided for alleviating deadlock and controlling congestion in a network such as a fibre channel network. Techniques are provided for detecting stalled frames at a fibre channel switch. Reserve credits are released when stalled frames are detected. In some instances, reserve credits are released after a predetermined period of time. Reserve credits allow transmission to effectively reduce deadlock and congestion. Reserve credits are particularly effective in reducing deadlock resulting from transient loops in a fibre channel network.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: January 29, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Raymond J. Kloth, Maurilio Cometto
  • Publication number: 20070153816
    Abstract: A fibre channel frame is received at a first fibre channel switch. The fibre channel frame includes time stamp information associated with fibre channel switches between a second fibre channel switch and the first fibre channel switch. A time-to-live (TTL) value included in the fibre channel frame is determined. The fibre channel frame is sent back to the second fibre channel switch upon determining the TTL value included in the fibre channel frame.
    Type: Application
    Filed: March 2, 2007
    Publication date: July 5, 2007
    Inventors: Maurilio Cometto, Thomas Edsall
  • Patent number: 7206288
    Abstract: Methods and apparatus are provided for determining characteristics associated with routes in fibre channel networks. Techniques are provided for inserting time stamp information into frames transmitted from a source to a destination and back to the source. Time stamp information allows a supervisor associated with a source to determine characteristics such as round trip times, latency between hops, and connectivity to a destination for specific routes.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: April 17, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Thomas James Edsall