Patents by Inventor Mavis J. Chaboya

Mavis J. Chaboya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Etch back process approach in dual source plasma reactors
    Patent number: 7160813
    Abstract: A method is disclosed for removing a polysilicon layer from a semiconductor wafer, in which a downstream plasma source is used first to planarize the wafer, removing contours in the polysilicon layer caused by deposition over lithographic features, such as via holes. The planarizing process is followed by exposure to a plasma made by a direct, radio frequency plasma source, which may be in combination with the downstream plasma source, to perform the bulk etching of the polysilicon. The invention can produce planar surface topography after the top layer of the film is removed, in which the residual recess height of the polysilicon plug filling a via hole is less than about about 10 nm.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: January 9, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Cindy W. Chen, Eddie Chiu, Mavis J. Chaboya, Yuh-Jia Su