Abstract: A method is disclosed to debug a computer program. The method provides a computer program comprising source code, and a listing of that source code. The method further provides a computing device comprising a data storage medium, and stores the computer program in that data storage medium. The method then runs the computer program, and subsequently detects an error condition. The method creates and saves to the data storage medium a dump file comprising (N) save areas. Using information abstracted from the dump file and the source code listing, the method reproduces the source code execution at the time the error condition was detected.

Abstract: A platform and method of deploying virtual processing areas networks are described. A plurality of computer processors are connected to an internal communication network. At least one control node is in communication with an external communication network and an external storage network has an external storage address space. The at least one control node is connected to the internal network and thereby is in communication with the plurality of computer processors. Configuration logic defines and establishes a virtual processing area network having a corresponding set of computer processors from the plurality of processors, a virtual local area communication network providing communication among the set of computer processors, and a virtual storage space with a defined correspondence to the address space of the storage network.

Abstract: A virtual networking system and method are disclosed. Switched Ethernet local area network semantics are provided over an underlying point to point mesh. Computer processor nodes may directly communicate via virtual interfaces over a switch fabric or they may communicate via an ethernet switch emulation. Address resolution protocol logic helps associate IP addresses with virtual interfaces while allowing computer processors to reply to ARP requests with virtual MAC addresses.

Abstract: Methods and apparatus are provided for managing data in a hierarchal storage subsystem. A plurality of volumes is designated as a storage group for Level 0 storage; a high threshold is established for the storage group; space is allocated for a data set to a volume of the storage group, storing the data set to the volume; the high threshold is compared with a total amount of space consumed by all data sets stored to volumes in the storage group; and data sets are migrated from the storage group to a Level 1 storage if the high threshold is less than or equal to the total amount of space used by all of the data sets stored to volumes in the storage group. Optionally, high threshold are assigned to each storage group and, when the space used in a storage group reaches or exceeds the high threshold, migration of data will begin from volumes in the storage group, beginning with the volume having the least free space. Thus, contention between migration and space allocation is reduced.

Abstract: A platform for and method of computer processing to support processor failover are disclosed. A plurality of computer processors are connected to an internal communication network. A virtual local area communication network over the internal network is defined and established. Each computer processor in the virtual local area communication network has a corresponding virtual MAC address and the virtual local area network provides communication among a set of computer processors but excludes the processors from the plurality not in the defined set. A virtual storage space is defined and established with a defined correspondence to the address space of the storage network. In response to a failure by a computer processor, a computer processor from the plurality is allocated to replace the failed processor. The MAC address of the failed processor is assigned to the processor that replaces the failed processor.

Abstract: A platform for and method of computer processing to support processor failover are disclosed. A plurality of computer processors are connected to an internal communication network. A virtual local area communication network over the internal network is defined and established. Each computer processor in the virtual local area communication network has a corresponding virtual MAC address and the virtual local area network provides communication among a set of computer processors but excludes the processors from the plurality not in the defined set. A virtual storage space is defined and established with a defined correspondence to the address space of the storage network. In response to a failure by a computer processor, a computer processor from the plurality is allocated to replace the failed processor. The MAC address of the failed processor is assigned to the processor that replaces the failed processor.

Abstract: Apparatuses and methods to allow tools disposed upon a conduit to enter the bore of a drillstring is presented. The apparatuses and methods include the use of one or more articulated knuckle joints at ends of an entry sub. The articulated knuckle joints are capable of articulating the entry sub among various conduit entry and load carrying positions.

Abstract: A deflectable in-line swivel that permits axial deflection of a tubular string is presented. The in-line swivel is preferably constructed as a ball and socket design whereby the ball of a swivel mandrel is permitted to articulate within a socket of a retainer sub. The system preferably includes a thrust bearing to allow the tensile loads to be carried across the swivel.

Abstract: A platform and method of deploying virtual processing areas networks are described. A plurality of computer processors are connected to an internal communication network. At least one control node is in communication with an external communication network and an external storage network has an external storage address space. The at least one control node is connected to the internal network and thereby is in communication with the plurality of computer processors. Configuration logic defines and establishes a virtual processing area network having a corresponding set of computer processors from the plurality of processors, a virtual local area communication network providing communication among the set of computer processors, and a virtual storage space with a defined correspondence to the address space of the storage network.

Abstract: A virtual networking system and method are disclosed. Switched Ethernet local area network semantics are provided over an underlying point to point mesh. Computer processor nodes may directly communicate via virtual interfaces over a switch fabric or they may communicate via an ethernet switch emulation. Address resolution protocol logic helps associate IP addresses with virtual interfaces while allowing computer processors to reply to ARP requests with virtual MAC addresses.

Abstract: A virtual networking system and method are disclosed. Switched Ethernet local area network semantics are provided over an underlying point to point mesh. Computer processor nodes may directly communicate via virtual interfaces over a switch fabric or they may communicate via an ethernet switch emulation. Address resolution protocol logic helps associate IP addresses with virtual interfaces while allowing computer processors to reply to ARP requests with virtual MAC addresses.

Abstract: A platform for and method of computer processing to support processor failover are disclosed. A plurality of computer processors are connected to an internal communication network. A virtual local area communication network over the internal network is defined and established. Each computer processor in the virtual local area communication network has a corresponding virtual MAC address and the virtual local area network provides communication among a set of computer processors but excludes the processors from the plurality not in the defined set. A virtual storage space is defined and established with a defined correspondence to the address space of the storage network. In response to a failure by a computer processor, a computer processor from the plurality is allocated to replace the failed processor. The MAC address of the failed processor is assigned to the processor that replaces the failed processor.