Abstract: A system and method for virtualization of processor resources is presented. A thread is created on a processor and the processor's local memory is mapped into an effective address space. In doing so, the processor's local memory is accessible by other processors, regardless of whether the processor is running. Additional threads create additional local memory mappings into the effective address space. The effective address space corresponds to either a physical local memory or a “soft” copy area. When the processor is running, a different processor may access data that is located in the first processor's local memory from the processor's local storage area. When the processor is not running, a softcopy of the processor's local memory is stored in a memory location (i.e. locked cache memory, pinned system memory, virtual memory, etc.) for other processors to continue accessing.

Abstract: A system and method for sharing resources between real-time and virtualizing operating systems is presented. A computer system uses effective address mapping of support processors' local memory to share resources between separate operating systems. When threads are created for either operating system, the thread's corresponding processor memory is mapped into an effective address space. In doing so, the processor's local memory is accessible by the thread, regardless of whether the processor is running, or whether the processor is executing a different thread from a different operating system. For example, a computer system may have eight support processors and running two operating systems whereby the first operating system requires six support processors and the second operating system requires all eight support processors. In this example, resources are virtualized and shared between the two operating systems in order to meet the requirements of both operating systems.

Abstract: A system and method is provided to deliver messages to processors operating in a multi-processing environment. In a multi-processor environment, interrupts are managed by storing events in a queue that correspond to a particular support processor. A main processor decodes an interrupt and determines which support processor generated the interrupt. The main processor then determines whether a kernel or an application should process the interrupt. Interrupts such as page faults, segment faults, and alignment errors are handled by the kernel, while “informational” signals, such as stop and signal requests, halt requests, mailbox requests, and DMC tag complete requests are handled by the application. In addition, multiple identical events are maintained, and event data may be included in the interrupt using the invention described herein.

Abstract: A system, apparatus and method for supporting multiple file systems in boot code of a computer. The boot code according to the present invention first identifies file systems used by a boot disk and then identifies operating systems associated with the identified file systems. Based on the identified operating systems, the boot sector for an appropriate operating system is located and loaded. Thereafter, the boot code relinquishes control to the loaded operating system. The boot code is capable of supporting multiple file systems, multiple operating systems located in a plurality of partitions of a boot disk, and multiple operating systems using the same file system.

Abstract: A method and apparatus for updating a current boot code in a data processing system in which the current boot code is used to load an operating system from a storage device. The storage device is searched for an updated boot code for the operating system in response to starting the data processing system. The current boot code is updated prior to loading the operating system for the data processing system if the updated boot code is present in the storage device.

Abstract: A method and a system for managing a computer system's multiple processors as devices. The operating system accesses the multiple processors using processor device modules loaded into the operating system to facilitate a communication between an application requesting access to a processor and the processor. A device-like access is determined for accessing each one of the processors similar to device-like access for other devices in the system such as disk drives, printers, etc. An application seeking access to a processor issues device-oriented instructions for processing data, and in addition, the application provides the processor with the data to be processed. The processor processes the data according to the instructions provided by the application.

Abstract: A system and method for loading software on a plurality of processors is presented. A processing unit (PU) retrieves a file from system memory and loads it into its internal memory. The PU extracts a processor type from the file's header which identifies whether the file should execute on the PU or a synergistic processing unit (SPU). If an SPU should execute the file, the PU DMA's the file to the SPU for execution. In one embodiment, the file is a combined file which includes both PU and SPU code. In this embodiment, the PU identifies one or more section headers included in the file which indicates embedded SPU code within the combined file. In this embodiment, the PU extracts the SPU code from the combined file and DMA's the extracted code to an SPU for execution.

Abstract: A system and method for grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.

Abstract: A system and method for a processor thread acting as a system service provider is presented. A computer system boots up and initiates a service thread. The service thread is responsible for service related tasks, such as ECC checks and hardware log error checks. The service provider invokes a second thread which is used as an operational thread. The operational thread loads an operating system, a kernel, and runs various applications. While the operational thread executes, the service thread monitors the operational thread for proper functionality as well as monitoring service events. When the service thread detects a problem with either one of the service events or the operational thread, the service thread may choose to store operational data corresponding to the operational thread and terminates the operational thread.

Abstract: A system and method for an asymmetric heterogeneous multi-threaded operating system are presented. A processing unit (PU) provides a trusted mode environment in which an operating system executes. A heterogeneous processor environment includes a synergistic processing unit (SPU) that does not provide trusted mode capabilities. The PU operating system uses two separate and distinct schedulers which are a PU scheduler and an SPU scheduler to schedule tasks on a PU and an SPU, respectively. In one embodiment, the heterogeneous processor environment includes a plurality of SPUs. In this embodiment, the SPU scheduler may use a single SPU run queue to schedule tasks for the plurality of SPUs or, the SPU scheduler may use a plurality of run queues to schedule SPU tasks whereby each of the run queues correspond to a particular SPU.

Abstract: A system and method is provided to perform code handling, such as interpreting language instructions or performing “just-in-time” compilation using a heterogeneous processing environment that shares a common memory. In a heterogeneous processing environment that includes a plurality of processors, one of the processors is programmed to perform a dedicated code-handling task, such as perform just-in-time compilation or interpretation of interpreted language instructions, such as Java. The other processors request code handling processing that is performed by the dedicated processor. Speed is achieved using a shared memory map so that the dedicated processor can quickly retrieve data provided by one of the other processors.

Abstract: A system and method for using a processor thread as a debugger is presented. A computer system boots up and initiates a debugger thread. The debugger thread loads a robust, debugger operating system and executes the debugger operating system. Once the debugger thread is functioning, the debugger thread invokes an operational thread. In turn, the operational thread loads a primary operating system and may run various applications. While the operational thread executes the primary operating system and the applications, the debugger thread monitors the operational thread for proper functionality. When the operational thread crashes or terminates, the debugger thread retrieves operational data from the operational thread and provides the operational data to a software developer for analysis.

Abstract: A system and method are provided to dedicate one or more processors in a multiprocessing system to performing encryption functions. When the system initializes, one of the synergistic processing unit (SPU) processors is configured to run in a secure mode wherein the local memory included with the dedicated SPU is not shared with the other processors. One or more encryption keys are stored in the local memory during initialization. During initialization, the SPUs receive nonvolatile data, such as the encryption keys, from nonvolatile register space. This information is made available to the SPU during initialization before the SPUs local storage might be mapped to a common memory map. In one embodiment, the mapping is performed by another processing unit (PU) that maps the shared SPUs' local storage to a common memory map.

Abstract: Initially, a SMI trap detects an application accessing a memory location associated with a physical hardware device. The SMI trap receives the device address for the address bus and compares that address with memory addresses for hardware devices being virtualized by virtual device simulators. If the address matches an available virtual device, the SMI caches the address, hooks and caches the corresponding IO instruction for the memory address and issues a SMI. A SMI handler receives the SMI and determines which virtual device simulator to call. Once activated by the SMI handler, the virtual device simulator interacts with the application and then returns control to the processor.

Abstract: A data processing system with bootcode support for communicating with a noncompliant external device has a motherboard, non-volatile memory connected to the motherboard, a volatile memory, processing resources, a communications port that utilizes a first communications protocol, and one or more buses interconnecting those components. Startup instructions obtained from the non-volatile memory load a device driver for the external device from the non-volatile memory into the volatile memory. However, unlike the communications port, the external device utilizes a second communications protocol. Diagnostic instructions then utilize the device driver to communicate with the external device via the communications port.

Abstract: A method and system for booting a user station in a computer network in which a first set of operating system information retrieved from the user station is used to attempt to boot the user station from a remote server. If the boot attempt fails, an iterative process is initiated in which a next set of operating system information is retrieved and used to attempt to boot the user station until a boot attempt is successful. Upon successfully booting the user station, the operating system information is modified to prioritize the set of information that resulted in a successful boot such that the successful set of information is selected first during a subsequent boot attempt. The operating system information may include a directory path of the remote server in which the user station attempts to locate an operating system kernel.

Abstract: A method for booting a user station in a computer network in which a boot sequence is initiated by retrieving boot parameter information from a remote boot server. If the boot server fails to supply information for at least one boot parameter, it is determined whether a default value may be used for the boot parameter. If a default value may be used, a default value is retrieved from local nonvolatile storage. Each entry in the boot parameter table may include a default indicator for determining whether the default value is used if the boot server fails to supply a value for the associated boot parameter. The boot parameter table may include an override indicator to indicate whether a parameter value retrieved from the boot server is overridden.

Abstract: A method and system for booting a multiple network adapter user station in a computer network are disclosed. The user station includes at least first and second network adapters. Initially, one of the adapters is selected based upon an ordering of the adapters. The user station then determines whether the selected adapter is connectable to the computer network. If the selected adapter is not connectable to the network, an iterative process is initiated in which a next adapter is selected and a determination made as to whether the next adapter is connectable to the network. Upon successfully determining which adapter is connectable to the network, the adapters are re-ordered to prioritize the adapter connectable to the network such that the network connectable adapter is selected first during a subsequent boot attempt. Determining whether the selected adapter is connectable to the computer network may include attempting to boot the user station from a remote server using the selected adapter.

Abstract: A compact connector for a data processing system motherboard facilitates the performance of diagnostics on data processing system components. The connector includes first, second, and third terminals in communication with respective first, second, and third lines in the motherboard for serial port interrupts, system data, and keyboard interrupts, respectively. In an illustrative embodiment, the first and second lines comprise lines of an Industry Standard Architecture (ISA) bus, and the compact connector also includes a fourth terminal in communication with a fourth line in the motherboard for real-time-clock interrupts. This embodiment allows the motherboard to receive real-time-clock interrupts via the connector, so that a startup program of the data processing system may boot to an operating system that requires a real-time-clock. That operating system may then be utilized to test the motherboard.

Abstract: A system, apparatus and method for supporting multiple file systems in boot code of a computer. The boot code according to the present invention first identifies file systems used by a boot disk and then identifies operating systems associated with the identified file systems. Based on the identified operating systems, the boot sector for an appropriate operating system is located and loaded. Thereafter, the boot code relinquishes control to the loaded operating system. The boot code is capable of supporting multiple file systems, multiple operating systems located in a plurality of partitions of a boot disk, and multiple operating systems using the same file system.