Patents by Inventor Mehdi H. Sani

Mehdi H. Sani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8599597
    Abstract: In a particular embodiment, an apparatus includes a one-time programmable (OTP) memory circuit configured to be responsive to a programming voltage. The OTP memory circuit includes an OTP memory array including OTP memory cells, a first power switch configured to decouple the OTP memory array from the programming voltage, and a second power switch configured to decouple a subset of the OTP memory cells from the programming voltage.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: December 3, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Esin Terzioglu, Gregory A. Uvieghara, Mehdi H. Sani, Anil Kota, Sei Seung Yoon
  • Publication number: 20130294139
    Abstract: In a particular embodiment, an apparatus includes a one-time programmable (OTP) memory circuit configured to be responsive to a programming voltage. The OTP memory circuit includes an OTP memory array including OTP memory cells, a first power switch configured to decouple the OTP memory array from the programming voltage, and a second power switch configured to decouple a subset of the OTP memory cells from the programming voltage.
    Type: Application
    Filed: May 7, 2012
    Publication date: November 7, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Esin Terzioglu, Gregory A. Uvieghara, Mehdi H. Sani, Anil Kota, Sei Seung Yoon
  • Patent number: 8078122
    Abstract: Circuitry that generates an interface signal between a first and a second integrated circuit (IC). The circuitry includes a reference circuit that provides a reference signal, an interface circuit, and a circuit element. The interface circuit is implemented on the first IC, operatively couples to the reference circuit, receives the reference signal and a data input, and generates the interface signal. The circuit element is implemented on the second IC, operatively couples to the control circuit, receives the interface signal, and provides an output signal. The reference signal can be a voltage or a current signal, and can be generated in the first or second IC. The interface circuit can be implemented with a current mirror coupled to a switch array, and can be oversampled to ease the filtering requirement. The interface signal can be a differential current signal having multiple (e.g., four, eight, or more) bits of resolution. The circuit element can be, for example, a VGA, a modulator, or other circuits.
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: December 13, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Gurkanwal Sahota, Mehdi H. Sani, Sassan Shahrokhinia
  • Patent number: 6975362
    Abstract: A VGA to analog video converter is useful e.g. for displaying video and/or graphics data from a computer onto a large screen television or television monitor. The RGB video signals output from the personal computer are first converted to digital form. The analog-to-digital converter which does this is clocked by a clock signal generated by a phase-locked loop using the horizontal synchronizing signal from the personal computer. The digital RGB signals are then converted to a YCbCR format. A flicker filter eliminates the flickering appearing on the TV monitor by operating on the luminance (Y) component. The YCbCr signals are encoded into NTSC or PAL Standard, and output in composite analog video or S-VHS format. A color subcarrier synthesizer generates the color subcarrier signal to generate an accurate subcarrier frequency for the video output signals. An analog-to-digital clock phase adjustment is used to ensure that the input RGB signals are sampled at the proper instant by the analog-to-digital converters.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: December 13, 2005
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Mehdi H. Sani, De Dzwo Hsu, Willard K. Bucklen
  • Publication number: 20040023620
    Abstract: Circuitry that generates an interface signal between a first and a second integrated circuit (IC). The circuitry includes a reference circuit that provides a reference signal, an interface circuit, and a circuit element. The interface circuit is implemented on the first IC, operatively couples to the reference circuit, receives the reference signal and a data input, and generates the interface signal. The circuit element is implemented on the second IC, operatively couples to the control circuit, receives the interface signal, and provides an output signal. The reference signal can be a voltage or a current signal, and can be generated in the first or second IC. The interface circuit can be implemented with a current mirror coupled to a switch array, and can be oversampled to ease the filtering requirement. The interface signal can be a differential current signal having multiple (e.g., four, eight, or more) bits of resolution. The circuit element can be, for example, a VGA, a modulator, or other circuits.
    Type: Application
    Filed: July 21, 2003
    Publication date: February 5, 2004
    Inventors: Gurkanwal Sahota, Mehdi H. Sani, Sassan Shahrokhinia
  • Patent number: 6615027
    Abstract: Circuitry that generates an interface signal between a first and a second integrated circuit (IC). The circuitry includes a reference circuit that provides a reference signal, an interface circuit, and a circuit element. The interface circuit is implemented on the first IC, operatively couples to the reference circuit, receives the reference signal and a data input, and generates the interface signal. The circuit element is implemented on the second IC, operatively couples to the control circuit, receives the interface signal, and provides an output signal. The reference signal can be a voltage or a current signal, and can be generated in the first or second IC. The interface circuit can be implemented with a current mirror coupled to a switch array, and can be oversampled to ease the filtering requirement. The interface signal can be a differential current signal having multiple (e.g., four, eight, or more) bits of resolution. The circuit element can be, for example, a VGA, a modulator, or other circuits.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: September 2, 2003
    Assignee: Qualcomm Incorporated
    Inventors: Gurkanwal Sahota, Mehdi H. Sani, Sassan Shahrokhinia
  • Publication number: 20030020830
    Abstract: A VGA to analog video converter is useful e.g. for displaying video and/or graphics data from a computer onto a large screen television or television monitor. The RGB video signals output from the personal computer are first converted to digital form. The analog-to-digital converter which does this is clocked by a clock signal generated by a phase-locked loop using the horizontal synchronizing signal from the personal computer. The digital RGB signals are then converted to a YCbCR format. A flicker filter eliminates the flickering appearing on the TV monitor by operating on the luminance (Y) component. The YCbCr signals are encoded into NTSC or PAL Standard, and output in composite analog video or S-VHS format. A color subcarrier synthesizer generates the color subcarrier signal to generate an accurate subcarrier frequency for the video output signals. An analog-to-digital clock phase adjustment is used to ensure that the input RGB signals are sampled at the proper instant by the analog-to-digital converters.
    Type: Application
    Filed: May 13, 2002
    Publication date: January 30, 2003
    Inventors: Mehdi H. Sani, De Dzwo Hsu, Willard K. Bucklen
  • Patent number: 6429904
    Abstract: A VGA to analog video converter is useful e.g. for displaying video and/or graphics data from a computer onto a large screen television or television monitor. The RGB video signals output from the personal computer are first converted to digital form. The analog-to-digital converter which does this is clocked by a clock signal generated by a phase-locked loop using the horizontal synchronizing signal from the personal computer. The digital RGB signals are then converted to a YCbCR format. A flicker filter eliminates the flickering appearing on the TV monitor by operating on the luminance (Y) component. The YCbCr signals are encoded into NTSC or PAL Standard, and output in composite analog video or S-VHS format. A color subcarrier synthesizer generates the color subcarrier signal to generate an accurate subcarrier frequency for the video output signals. An analog-to-digital clock phase adjustment is used to ensure that the input RGB signals are sampled at the proper instant by the analog-to-digital converters.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: August 6, 2002
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Mehdi H. Sani, De Dzwo Hsu, Willard K. Bucklen
  • Publication number: 20010017666
    Abstract: A VGA to analog video converter is useful e.g. for displaying video and/or graphics data from a computer onto a large screen television or television monitor. The RGB video signals output from the personal computer are first converted to digital form. The analog-to-digital converter which does this is clocked by a clock signal generated by a phase-locked loop using the horizontal synchronizing signal from the personal computer. The digital RGB signals are then converted to a YCbCR format. A flicker filter eliminates the flickering appearing on the TV monitor by operating on the luminance (Y) component. The YCbCr signals are encoded into NTSC or PAL Standard, and output in composite analog video or S-VHS format. A color subcarrier synthesizer generates the color subcarrier signal to generate an accurate subcarrier frequency for the video output signals. An analog-to-digital clock phase adjustment is used to ensure that the input RGB signals are sampled at the proper instant by the analog-to-digital converters.
    Type: Application
    Filed: February 13, 2001
    Publication date: August 30, 2001
    Inventors: Mehdi H. Sani, De Dzwo Hsu, Willard K. Bucklen
  • Patent number: 6219101
    Abstract: A VGA to analog video converter is useful e.g. for displaying video and/or graphics data from a computer onto a large screen television or television monitor. The RGB video signals output from the personal computer are first converted to digital form. The analog-to-digital converter which does this is clocked by a clock signal generated by a phase-locked loop using the horizontal synchronizing signal from the personal computer. The digital RGB signals are then converted to a YCbCR format. A flicker filter eliminates the flickering appearing on the TV monitor by operating on the luminance (Y) component. The YCbCr signals are encoded into NTSC or PAL Standard, and output in composite analog video or S-VHS format. A color subcarrier synthesizer generates the color subcarrier signal to generate an accurate subcarrier frequency for the video output signals. An analog-to-digital clock phase adjustment is used to ensure that the input RGB signals are sampled at the proper instant by the analog-to-digital converters.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: April 17, 2001
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Mehdi H. Sani, De Dzwo Hsu, Willard K. Bucklen
  • Patent number: 5786866
    Abstract: A color subcarrier signal generator for use e.g, in a video converter measures the average error of the horizontal synchronizing signal frequency. The measured error is used as a compensator signal to control a direct digital synthesizer to generate a correct color subcarrier signal. The direct digital frequency synthesizer includes an address generator receiving the error signal and a look up table driven by the address generator.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: July 28, 1998
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Mehdi H. Sani, De Dzwo Hsu, Willard K. Bucklen
  • Patent number: 4656372
    Abstract: The circuits of the present invention convert CMOS logic levels to corresponding ECL logic levels to permit the coupling of CMOS and ECL circuits. One preferred circuit embodiment is comprised of three p-channel transistors and one n-channel transistor. The first p-transistor has its source connected to a reference potential, such as ground, and its drain electrode connected to the source of the second p-transistor. The drain and the gate of the second p-transistor are connected together to an output terminal. The drain of the third p-transistor is connected to the output terminal. The gate and the source of the third p-transistor are connected to the drain of the n-transistor. The source of the n-transistor is connected to a CMOS compatible potential source. The CMOS logic level signal is coupled to the gate of the first p-transistor and the gate of the n-transistor. The output terminal is connected to an ECL compatible potential source via a termination resistor.
    Type: Grant
    Filed: November 25, 1985
    Date of Patent: April 7, 1987
    Assignee: NCR Corporation
    Inventors: Mehdi H. Sani, Donald G. Tipon
  • Patent number: 4598216
    Abstract: A circuit for assisting transitions of a signal on a bus conductor having a sensing element connected to the bus conductor for determining if the bus conductor is in a first state or a second state, an assisting element for assisting transitions of a signal on the bus conductor between its first state and its second state responsive to electrical clock pulses, and a logic element connected to the sensing element and the assist element for enabling said assist element when the transmission of the mentioned signal is from its first state to its second state during said clock pulses, and for disabling the assisting element when the mentioned signal transition is from its second state to its first state during said clock pulses.
    Type: Grant
    Filed: August 27, 1984
    Date of Patent: July 1, 1986
    Assignee: NCR Corporation
    Inventors: Donald K. Lauffer, Paul M. Rostek, Mehdi H. Sani