Abstract: A boost regulator is provided that has increased efficiency. The increased efficiency is provided by incorporating a sensing circuit that senses when the current in the boost regulator's inductor is near zero or when the voltage at its switching node is near zero or virtual ground. A switching signal is provided to the boost regulator's switching transistor when the near zero current or voltage is sensed. Switching at the near zero current or voltage moment (the “critical conduction moment”) helps to eliminate or minimize the power loss associated with switching the transistor at a time other than during the critical conduction moment.

Abstract: Class D amplifiers and methods of amplification wherein a load is periodically coupled to a positive power supply connection through a first switch or a negative power supply connection through a second switch for a period responsive to an input signal. A third switch couples the load to a circuit ground connection during times when the load is not coupled to either the positive or the negative power supply connection. This provides a load current recirculation path through the ground connection, which together with the inductance of the load, tends to maintain the load current when both the first and second switches are open. Loads such as speakers may be directly connected to the amplifier output, or may be coupled to the amplifier output through a filter. Various exemplary control methods, including use of feedback, are disclosed.

Abstract: Hot swappable pulse width modulation power supply circuits preferably realized in integrated circuit form. The hot swap circuits provide for de-bouncing, controlled charging of the input capacitor of the power supply circuit and soft-start of the pulse width modulator after charging the input capacitor. Other features include a low voltage lockout, and an output for coupling to a synchronous rectifier driver to synchronize synchronous rectifiers on the secondary side of a coupling transformer in isolated systems. The hot swap capability may be disabled through an enable pin, or not implemented by not connecting the integrated circuit in a manner to use the hot swap capability.

Abstract: An improved class D power amplifier is disclosed. Instead of using prior art triangle waves, a ramp signal having a first state of about 90% or greater is used and a second state for the remainder of the cycle. Further, the amplifier includes flip-flops and amplifiers with hysteresis to reduce switching noise. Also, level shifting circuitry is provided for shifting the level of the input signal in response to both DC and AC variations in the power supply and to provide power supply rejection. Still further, multiple channels may be used with all of the channels synchronized to the same timing source.

Abstract: Hot swap current limit circuits and methods that provide soft start, current limiting and thermal limiting suitable for realization in a single integrated circuit. The circuits incorporate both a fast current limit loop to limit current spikes, and a slower current limit loop to more accurately limit the maximum or limit current to a predetermined value for longer periods, such as during start up or prolonged periods of excessive load conditions. Details of an exemplary embodiment circuit and method are disclosed.

Abstract: An improved class D power amplifier is disclosed. Instead of using prior art triangle waves a ramp signal having a first state of about 90% or greater is used and a second state for the remainder of the cycle. Further, the amplifier includes flip-flops and amplifiers with hysteresis to reduce switching noise. Also, level shifting circuitry is provided for shifting the level of the input signal in response to both DC and AC variations in the power supply and to provide power supply rejection. Still further, multiple channels may be used with all of the channels synchronized to the same timing source.

Abstract: An improved class D power amplifier is disclosed. Instead of using prior art triangle waves, a ramp signal having a first state of about 90% or greater is used and a second state for the remainder of the cycle. Further, the amplifier includes flip-flops and amplifiers with hysteresis to reduce switching noise. Also, level shifting circuitry is provided for shifting the level of the input signal in response to both DC and AC variations in the power supply and to provide power supply rejection. Still further, multiple channels may be used with all of the channels synchronized to the same timing source.

Abstract: An improved class D power amplifier is disclosed. Instead of using prior art triangle waves, a ramp signal having a first state of about 90% or greater is used and a second state for the remainder of the cycle. Further, the amplifier includes flip-flops and amplifers with hysteresis to reduce switching noise. Also, level shifting circuitry is provided for shifting the level of the input signal in response to both DC and AC variations in the power supply and to provide power supply rejection. Still further, multiple channels may be used with all of the channels synchronized to the same timing source.

Abstract: A power converter circuit provides low conversion losses, low generated noise and output power controllability. The circuit includes a controller, at least two transistors and an output network that provides impedance matching and operating point stabilization functions. The output network also enables zero voltage switching of the transistors, thus reducing radiated noise and minimizing (and possibly eliminating almost completely) switching losses. The controller circuitry includes an oscillator which is capable of self synchronizing to the resonant frequency of the components of the output network. Power modulation (e.g., for dimming of a lamp) is accomplished simply by desynchronizing and increasing the oscillator frequency. Thus, the control architecture allows the use of external parts of lower precision and cost while providing dimming capability in a single stage.