Abstract: Methods and apparatus for performing automatic gain control (AGC) in bypass and filter modes for radio frequency (RF) front-end circuitry are described. An example method includes operating a receiver in a first mode during a first set of symbols of a first subframe. The method also includes, during a first symbol of the first subframe outside the first set of symbols, determining whether to operate the receiver in the first mode or a second mode in a second subframe, based at least in part on an output of a jamming detection circuit of the receiver in the first symbol. The method also includes controlling the receiver to operate in the first mode or the second mode in the second subframe, in accordance with the determination.

Abstract: A wideband amplifier includes an input matching network for matching a transconductor stage to an input impedance and includes an output matching network for matching the transconductor stage to an output impedance. Both the input and output matching networks each includes a parallel LC tank circuit arranged in parallel with a series LC tank circuit. The tank circuit arrangements configure the input and output matching networks to be resonant at a first frequency, a midrange frequency that is greater than the first frequency, and a second frequency that is greater than the midrange frequency to provide wideband matching.

Abstract: An aspect of the disclosure relates to a method of reducing a third-order intermodulation component at a first terminal of a transistor, including: receiving an input radio frequency (RF) signal cycling with a first frequency at a control terminal of the transistor; generating a feedback RF signal cycling at a second frequency at a second terminal of the transistor, wherein the second frequency is substantially twice the first frequency; and generating a third-order intermodulation cancellation component at the first terminal including combining the input RF signal with the feedback RF signal, wherein the third-order intermodulation cancellation component has a magnitude and phase substantially equal to and opposite a magnitude and phase of the third-order intermodulation component at the first terminal of the transistor, respectively.

Abstract: A device includes a low-noise amplifier (LNA) and a matching circuit. The matching circuit is coupled to an output of the LNA and switchably coupled to at least one of a first and a second output of the device. The device may further include a power splitter switchably coupled between an output of the matching circuit and the first and/or the second output of the device.

Abstract: A low noise amplifier (LNA) includes a transconductance device coupled to a cascode transistor. The LNA also includes a resistor capacitor (RC) feedback branch. The RC feedback branch includes a first resistor, a capacitor and a first switch. The RC feedback branch is fed back around the transconductance device and is coupled between a drain of either the cascode transistor or the transconductance device and a gate of the transconductance device.

Abstract: A device includes a low-noise amplifier (LNA) and a matching circuit. The matching circuit is coupled to an output of the LNA and switchably coupled to at least one of a first and a second output of the device. The device may further include a power splitter switchably coupled between an output of the matching circuit and the first and/or the second output of the device.

Abstract: An apparatus includes an inductor device including a first inductor coupled to a second inductor. The first inductor and the second inductor are connected to ground. A first transistor and a second transistor are coupled to the inductor device. A first cascode transistor is coupled to the first transistor, and a second cascode transistor is coupled to the second transistor. The first cascode transistor is coupled to a first output, and the second cascode transistor is coupled to a second output.

Abstract: A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass capacitance and selectively enable the at least one of the amplification paths based on a selected operating mode.

Abstract: A device includes a first amplifier circuit coupled to a first transformer and a second transformer, the first transformer selectively coupled to a first shared power distribution network through a first switch, the second transformer selectively coupled to a second shared power distribution network through a second switch.

Abstract: A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass capacitance and selectively enable the at least one of the amplification paths based on a selected operating mode.

Abstract: A device includes a first amplifier circuit coupled to a first transformer and a second transformer, the first transformer selectively coupled to a first shared power distribution network through a first switch, the second transformer selectively coupled to a second shared power distribution network through a second switch.