Patents by Inventor Mei Mei

Mei Mei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118340
    Abstract: A tester system includes a test computer system for coordinating and controlling testing of a plurality of devices under test (DUTs) and a hardware interface module coupled to the test computer system and controlled by the test computer system, the hardware interface module operable to apply test input signals to the plurality of DUTs and operable to receive test output signals from the plurality of DUTs. The hardware interface module includes a memory for storing instructions and data, a high performance processor coupled to the memory, the high performance processor operable to perform testing functionality at high speed for application of test signals to the plurality of DUTs, the high performance processor operable to perform the testing functionality under control of instructions and data from the memory and under control from software commands from the test computer system, wherein further the high performance processor is not natively capable of low power mode operation.
    Type: Application
    Filed: August 3, 2023
    Publication date: April 11, 2024
    Inventors: Edmundo De La Puente, Mei-Mei Su, Srdjan Malisic
  • Publication number: 20240094287
    Abstract: A tester system includes a test computer system for coordinating and controlling testing of a plurality of devices under test (DUTs) and a hardware interface module coupled to the test computer system and controlled by the test computer system, the hardware interface module operable to apply test input signals to the plurality of DUTs and operable to receive test output signals from the plurality of DUTs. The hardware interface module includes a memory for storing instructions and data, a high performance processor coupled to the memory, the high performance processor operable to perform testing functionality at high speed for application of test signals to the plurality of DUTs, the high performance processor operable to perform the testing functionality under control of instructions and data from the memory and under control from software commands from the test computer system, wherein further the high performance processor is not natively capable of low power mode operation.
    Type: Application
    Filed: August 3, 2023
    Publication date: March 21, 2024
    Inventors: Edmundo De La Puente, Linden Hsu, Mei-Mei Su, Marilyn Kushnick
  • Patent number: 11860229
    Abstract: An automated test equipment (ATE) apparatus comprising a tester processor operable to generate commands and data for coordinating testing of a plurality of devices under test (DUTs). The ATE further comprises a field programmable gate array (FPGA) communicatively coupled to the tester processor, wherein the FPGA comprises routing logic operable to route signals associated with the commands and data in the FPGA based on a type of the device under test (DUT). Further, the ATE comprises a connector module communicatively coupled to the FPGA comprising a socket to which the DUT connects and further comprising circuitry for routing the signals to a set of pins on the DUT, wherein the set of pins are associated with a first type of DUT. The circuitry can support multiple different DUT types having a common form factor but different pinout assignments.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: January 2, 2024
    Assignee: Advantest Corporation
    Inventor: Mei-Mei Su
  • Patent number: 11714132
    Abstract: Presented embodiments facilitate efficient and effective diagnostic of test system operations, including temperature control of test equipment components. In one embodiment a test equipment diagnostic method includes applying a known/expected first bit pattern to a test equipment component, applying a known/expected second bit pattern to a test equipment component, and performing a test equipment temperature control analysis based upon the results of applying the known/expected first bit pattern and known/expected second bit pattern. The first bit pattern and second bit pattern have known/expected respective thermal loads and corresponding respective first known/expected/expected temperature and second known/expected/expected temperature. In one embodiment, performing a test equipment temperature control analysis includes determining if temperature control components control a temperature of the test equipment component within acceptable tolerances.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: August 1, 2023
    Assignee: Advantest Corporation
    Inventors: Mei-Mei Su, Seth Craighead
  • Patent number: 11619667
    Abstract: Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, a tester system diagnostic method includes forwarding test signals to a loopback component; receiving the test signals from the loopback component; and analyzing the test signals to diagnose whether or not the test system is experiencing problems associated with electrostatic discharges, including analysis of eye scan configuration data corresponding to characteristics of the test signals. In one exemplary implementation, analyzing the eye scan configuration data, including analyzing symmetry of a graphical representation (e.g., eye pattern, eye diagram, etc.) of the eye scan configuration data with respect to a horizontal graphical representation axis.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: April 4, 2023
    Assignee: Advantest Corporation
    Inventors: Mei-Mei Su, Seth Craighead
  • Patent number: 11612088
    Abstract: The present invention provides an anisotropic, thermal conductive, electromagnetic interference (EMI) shielding composite including a plurality of aligned polymer nanofibers to form a polymer mat or scaffold having a first and second planes of orientation of the polymer nanofibers. The first plane of orientation of the polymer nanofibers has a thermal conductivity substantially the same as or similar to that of the second plane, and the thermal conductivity of the first or second plane of orientation of the polymer nanofibers is at least 2-fold of that of a third plane of orientation of the polymer nanofibers which is about 90 degrees out of the first and second planes of orientation of the polymer nanofibers, respectively, while the electrical resistance of each of the first and second planes is at least 3 orders lower than that of the third plane. A method for preparing the present composite is also provided.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: March 21, 2023
    Assignee: Nano and Advanced Materials Institute Limited
    Inventors: Chi Ho Kwok, Mei Mei Hsu, Ka I Lee, Chenmin Liu
  • Publication number: 20220275389
    Abstract: Aspects of the present disclosure relate to genetically altered plants having a heterologous EPR3 or EPR3-like polypeptide or a modified EPR3 or EPR3-like polypeptide and/or having a heterologous EPR3a or EPR3a-like polypeptide or a modified EPR3a or EPR3a-like polypeptide, wherein the EPR3 or EPR3-like polypeptide and/or the EPR3a or EPR3a-like polypeptide provide increased selectivity for a beneficial commensal microbe as compared to a wild-type plant under the same conditions. Other aspects of the present disclosure relate to methods of making such plants as well as cultivating these genetically altered plants. Additional aspects of the present disclosure relate to methods of identifying a beneficial commensal microbe capable of interacting with a plant root microbiota.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 1, 2022
    Applicant: Aarhus Universitet
    Inventors: Kasper Røjkjær ANDERSEN, Simon KELLY, Mei Mei Jaslyn Elizabeth WONG, Kira GYSEL, Simona RADUTOIU, Ke TAO, Simon Boje HANSEN, Jens STOUGAARD, Sha ZHANG
  • Publication number: 20220218861
    Abstract: Provided is an air purifier combined with an aromatizing device, including at least one air purifying unit having a lower housing, an upper housing, a fan, a filter, a filter cover, an aromatizing device, and a bottom cover. The lower housing is a hollow housing having a lower accommodating space for receiving the filter and the aromatizing device and is provided with air inlets at circumferences thereof for allowing external air to enter the air purifying unit. The filter is a hollow and cylindrical filter body having a hollow space for filtering external air. The aromatizing device is disposed within the hollow space of the filter for aromatizing purified air from the filter to generate purified and aromatized air. The upper housing is a hollow housing having an upper accommodating space for receiving the fan and is provided with air outlets at circumferences thereof for discharging purified and aromatized air.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 14, 2022
    Inventors: HSUAN-YU CHAO, MEI-MEI TSAI
  • Publication number: 20220162336
    Abstract: Disclosed are therapeutic payloads comprising p97 fragments coupled with active agents having blood-brain barrier (BBB) transport activity, including variants and combinations thereof, to facilitate delivery of therapeutic or diagnostic agents across the BBB. The therapeutic payloads can be effective in the treatment of conditions which involve the lymphatic system of the subject, and may also present a disease state in the brain of the subject. Methods of treating diseases involving the lymphatic system and pharmaceutical compositions are also disclosed.
    Type: Application
    Filed: July 19, 2019
    Publication date: May 26, 2022
    Applicant: Bioasis Technologies, Inc.
    Inventors: Mei Mei Tian, Mark Day
  • Publication number: 20220144906
    Abstract: Disclosed are therapeutic payloads comprising p97 fragments coupled with active agents having blood-brain barrier (BBB) transport activity, including variants and combinations thereof, to facilitate delivery of therapeutic or diagnostic agents across the BBB. The therapeutic payloads have dual functionality that may permit treatment of diseases in a subject other than diseases that present in the brain, e.g., solid tumors in the body. Methods of treating various diseases and pharmaceutical compositions are also disclosed.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 12, 2022
    Inventor: Mei Mei Tian
  • Publication number: 20220132709
    Abstract: The present invention provides an anisotropic, thermal conductive, electromagnetic interference (EMI) shielding composite including a plurality of aligned polymer nanofibers to form a polymer mat or scaffold having a first and second planes of orientation of the polymer nanofibers. The first plane of orientation of the polymer nanofibers has a thermal conductivity substantially the same as or similar to that of the second plane, and the thermal conductivity of the first or second plane of orientation of the polymer nanofibers is at least 2-fold of that of a third plane of orientation of the polymer nanofibers which is about 90 degrees out of the first and second planes of orientation of the polymer nanofibers, respectively, while the electrical resistance of each of the first and second planes is at least 3 orders lower than that of the third plane. A method for preparing the present composite is also provided.
    Type: Application
    Filed: September 21, 2021
    Publication date: April 28, 2022
    Inventors: Chi Ho Kwok, Mei Mei Hsu, Ka I Lee, Chenmin Liu
  • Patent number: 11302417
    Abstract: Methods for processing data using information gained from examining biological materials identifies and characterized probes for Single Nucleotide Polymorphisms and identifies Off Target Variants.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: April 12, 2022
    Assignee: Affymetrix, Inc.
    Inventors: Hong Gao, Ali Pirani, Teresa Webster, Mei-Mei Shen
  • Publication number: 20220048992
    Abstract: Provided are compositions and methods related to the co-administration of an immunoglobulin Fc region-containing polypeptide and a central nervous system (CNS)-targeted antibody or Fc-fusion polypeptide conjugate, to improve pharmacokinetics and/or delivery of the conjugate across the blood-brain barrier (BBB). Also provided are methods of treatment of indications and diseases of the CNS and indications and diseases with a CNS component.
    Type: Application
    Filed: August 13, 2021
    Publication date: February 17, 2022
    Applicant: Bioasis Technologies, Inc.
    Inventors: Reinhard Gabathuler, Mei Mei Tian
  • Publication number: 20210393787
    Abstract: Disclosed are therapeutic payloads comprising p97 fragments coupled with active agents having blood-brain barrier (BBB) transport activity, including variants and combinations thereof, to facilitate delivery of therapeutic or diagnostic agents across the BBB. The therapeutic payloads can be effective in the treatment of frontotemportal dementia (FTD). Methods of treating frontotemporal dementia (FTD) and pharmaceutical compositions are also disclosed.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 23, 2021
    Applicant: Bioasis Technologies, Inc.
    Inventors: Deborah Rathjen, Mei Mei Tian
  • Publication number: 20210355468
    Abstract: Disclosed are therapeutic payloads comprising p97 fragments coupled with active agents having blood-brain barrier (BBB) transport activity, including variants and combinations thereof, to facilitate delivery of therapeutic or diagnostic agents across the BBB. The therapeutic payloads can be effective in the treatment of Lewy body dementia. Methods of treating Lewy body dementia and pharmaceutical compositions are also disclosed.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 18, 2021
    Inventors: Deborah Ann Rathjen, Mei Mei Tian
  • Publication number: 20210340262
    Abstract: This disclosure related to antagonistic dual receptor antigen-binding proteins, e.g. antibodies and methods of using the dual receptor antibodies for treatment of pathological diseases. The dual receptor antibodies may comprise an antibody to ActRII receptors and may be used to treat pathological condition. The pathological conditions can comprise muscle wasting diseases or any disease that requires stimulation of muscle growth.
    Type: Application
    Filed: March 18, 2021
    Publication date: November 4, 2021
    Inventors: Huiquan HAN, Xiaolan ZHOU, Qing CHEN, Mei-Mei TSAI
  • Publication number: 20210302498
    Abstract: Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, a tester system diagnostic method includes forwarding test signals to a loopback component; receiving the test signals from the loopback component; and analyzing the test signals to diagnose whether or not the test system is experiencing problems associated with electrostatic discharges, including analysis of eye scan configuration data corresponding to characteristics of the test signals. In one exemplary implementation, analyzing the eye scan configuration data, including analyzing symmetry of a graphical representation (e.g., eye pattern, eye diagram, etc.) of the eye scan configuration data with respect to a horizontal graphical representation axis.
    Type: Application
    Filed: March 8, 2021
    Publication date: September 30, 2021
    Inventors: Mei-Mei Su, Seth Craighead
  • Publication number: 20210302501
    Abstract: Presented embodiments facilitate efficient and effective diagnostic of test system operations, including temperature control of test equipment components. In one embodiment a test equipment diagnostic method includes applying a known/expected first bit pattern to a test equipment component, applying a known/expected second bit pattern to a test equipment component, and performing a test equipment temperature control analysis based upon the results of applying the known/expected first bit pattern and known/expected second bit pattern. The first bit pattern and second bit pattern have known/expected respective thermal loads and corresponding respective first known/expected/expected temperature and second known/expected/expected temperature. In one embodiment, performing a test equipment temperature control analysis includes determining if temperature control components control a temperature of the test equipment component within acceptable tolerances.
    Type: Application
    Filed: March 31, 2021
    Publication date: September 30, 2021
    Inventors: Mei-Mei Su, Seth Craighead
  • Publication number: 20210302469
    Abstract: Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, a testing system comprises: a loadboard including multiple universal interfaces with the same coupling configuration, a plurality of devices under test (DUTs) including a plurality of DUT interfaces respectively, and a plurality of universal adapters including a plurality of matching universal interfaces that match the plurality of universal interfaces in the loadboard and a plurality of matching DUT interfaces that match the plurality of DUT interfaces in the respective DUT. The plurality of universal adapters are selectively coupled to the loadboard and the plurality of universal adapters are selectively coupled to the DUTs, respectively. A first one of the plurality of DUT interfaces includes a different coupling configuration than a second one of the plurality of DUT interfaces.
    Type: Application
    Filed: March 31, 2021
    Publication date: September 30, 2021
    Inventor: Mei-Mei Su
  • Publication number: 20210278458
    Abstract: A method for testing DUT comprises receiving instructions from a system controller at a tester board, wherein the tester board comprises an FPGA and the tester processor are coupled to the system controller, and wherein the tester processor is operable to coordinate testing of a device under test (DUT). The method further comprises generating commands and data for testing the DUT and routing signals associated with the commands and the data in the FPGA based on a type of the DUT. Also, the method comprises transmitting the signals over lanes corresponding to a particular set of pins on the DUT, wherein the particular set of pins depend on the type of the DUT.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 9, 2021
    Inventors: Mei-Mei SU, Chi YUAN, Linden HSU