Patents by Inventor Meir Dalal

Meir Dalal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10755787
    Abstract: A storage device includes storage circuitry and multiple memory cells. The memory cells are organized in multiple memory blocks of a nonvolatile memory. The storage circuitry is configured to define a partial verification scheme that specifies testing only a data portion of the data programmed to the memory blocks, to program data to a memory block, calculate redundancy data over the data, and save the calculated redundancy data in a dedicated memory, to verify that the data portion specified for the memory block in the partial verification scheme has been programmed successfully, to check a predefined condition for conditionally performing full verification to the memory block, when the predefined condition is fulfilled, to verify that data programmed to the memory block and not tested using the partial verification scheme has been programmed successfully, and to recover, using the redundancy data, at least part of the data programmed that failed verification.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: August 25, 2020
    Assignee: APPLE INC.
    Inventors: Eli Yazovitsky, Assaf Shappir, Itay Sagron, Meir Dalal
  • Publication number: 20200005873
    Abstract: A storage device includes storage circuitry and multiple memory cells. The memory cells are organized in multiple memory blocks of a nonvolatile memory. The storage circuitry is configured to define a partial verification scheme that specifies testing only a data portion of the data programmed to the memory blocks, to program data to a memory block, calculate redundancy data over the data, and save the calculated redundancy data in a dedicated memory, to verify that the data portion specified for the memory block in the partial verification scheme has been programmed successfully, to check a predefined condition for conditionally performing full verification to the memory block, when the predefined condition is fulfilled, to verify that data programmed to the memory block and not tested using the partial verification scheme has been programmed successfully, and to recover, using the redundancy data, at least part of the data programmed that failed verification.
    Type: Application
    Filed: November 28, 2018
    Publication date: January 2, 2020
    Inventors: Eli Yazovitsky, Assaf Shappir, Itay Sagron, Meir Dalal
  • Patent number: 9455040
    Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: September 27, 2016
    Assignee: Apple Inc.
    Inventors: Yael Shur, Yoav Kasorla, Moshe Neerman, Naftali Sommer, Avraham Poza Meir, Etai Zaltsman, Eyal Gurgi, Meir Dalal
  • Publication number: 20160093386
    Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Yael Shur, Yoav Kasorla, Moshe Neerman, Naftali Sommer, Avraham Poza Meir, Etai Zaltsman, Eyal Gurgi, Meir Dalal
  • Patent number: 9236132
    Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: January 12, 2016
    Assignee: Apple Inc.
    Inventors: Yael Shur, Yoav Kasorla, Moshe Neerman, Naftali Sommer, Avraham Poza Meir, Etai Zaltsman, Eyal Gurgi, Meir Dalal
  • Publication number: 20140355347
    Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
    Type: Application
    Filed: April 10, 2014
    Publication date: December 4, 2014
    Applicant: Apple Inc.
    Inventors: Yael Shur, Yoav Kasorla, Moshe Neerman, Naftali Sommer, Avraham Poza Meir, Etai Zaltsman, Eyal Gurgi, Meir Dalal
  • Patent number: 8830746
    Abstract: A method includes reading a group of analog memory cells using first explicit read thresholds, to produce first readout results. The group is re-read using second explicit read thresholds, to produce second readout results. The group is read using one or more sets of auxiliary thresholds so as to produce auxiliary readout results, such that the number of the auxiliary thresholds in each set is the same as the number of the first explicit read thresholds and the same as the number of the second explicit read thresholds. A readout performance of third read thresholds, which include at least one of the first explicit read thresholds and at least one of the second explicit read thresholds, is evaluated using the first, second and auxiliary readout results.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: September 9, 2014
    Assignee: Apple Inc.
    Inventors: Maya Barkon, Meir Dalal, Moti Teitel, Micha Anholt
  • Publication number: 20130258738
    Abstract: A method includes reading a group of analog memory cells using first explicit read thresholds, to produce first readout results. The group is re-read using second explicit read thresholds, to produce second readout results. The group is read using one or more sets of auxiliary thresholds so as to produce auxiliary readout results, such that the number of the auxiliary thresholds in each set is the same as the number of the first explicit read thresholds and the same as the number of the second explicit read thresholds. A readout performance of third read thresholds, which include at least one of the first explicit read thresholds and at least one of the second explicit read thresholds, is evaluated using the first, second and auxiliary readout results.
    Type: Application
    Filed: May 30, 2013
    Publication date: October 3, 2013
    Inventors: Maya Barkon, Meir Dalal, Moti Teitel, Micha Anholt