Abstract: A pyroelectric device having a substrate and a first electrode overlying at least a portion of the substrate. A plurality of spaced apart nanometer sized pyroelectric elements are electrically connected to and extending outwardly from the first electrode so that each element forms a single domain. A dielectric material is deposited in the space between the individual elements and a second electrode spaced apart from said first electrode is electrically connected to said pyroelectric elements.

Abstract: A pyroelectric device having a substrate and a first electrode overlying at least a portion of the substrate. A plurality of spaced apart nanometer sized pyroelectric elements are electrically connected to and extending outwardly from the first electrode so that each element forms a single domain. A dielectric material is deposited in the space between the individual elements and a second electrode spaced apart from said first electrode is electrically connected to said pyroelectric elements.

Abstract: An electronic device in the form a two-dimensional array of nanopillars extending generally normal to a substrate is provided. The nanopillars are made from a paraelectric or superparaelectric material. In addition, a linear dielectric medium is located between individual nanopillars. A two-dimensional array of paraelectric or superparaelectric nanopillars and a linear dielectric medium form the effective dielectric medium of a paraelectric or superparaelectric varactor. In some instances, the nanopillars are cylindrical nanopillars that have an average diameter and/or average height/length between 1-300 nanometers. In other instances, the nanopillars are quasi-nanoparticles that form self-aligned nano-junctions. In addition, each of the nanopillars has a single paraelectric or superparaelectric dipole domain therewithin. As such, each of the nanopillars can be void of crystallographic defects, polycrystallinity, interactions between ferroic domains, and defects due to ferroic domain walls.

Abstract: An electronic device in the form a two-dimensional array of nanopillars extending generally normal to a substrate is provided. The nanopillars are made from a paraelectric or superparaelectric material. In addition, a linear dielectric medium is located between individual nanopillars. A two-dimensional array of paraelectric or superparaelectric nanopillars and a linear dielectric medium form the effective dielectric medium of a paraelectric or superparaelectric varactor. In some instances, the nanopillars are cylindrical nanopillars that have an average diameter and/or average height/length between 1-300 nanometers. In other instances, the nanopillars are quasi-nanoparticles that form self-aligned nano-junctions. In addition, each of the nanopillars has a single paraelectric or superparaelectric dipole domain therewithin. As such, each of the nanopillars can be void of crystallographic defects, polycrystallinity, interactions between ferroic domains, and defects due to ferroic domain walls.

Abstract: Microelectromechanical systems (MEMS) include critical devices for various highly sensitive applications. However, MEMS operation may be impaired by vibration. A modular vibration control pedestal for integration with a MEMS is provided according to embodiments of the present invention which includes a piezoelectric perovskite oxide disposed on a substrate and a shape memory alloy component component disposed on the piezoelectric perovskite oxide. In particular embodiments of a MEMS device including a modular VCP, vibration is reduced by at least 50%.

Abstract: Microelectromechanical systems (MEMS) include critical devices for various highly sensitive applications. However, MEMS operation may be impaired by vibration. A modular vibration control pedestal for integration with a MEMS is provided according to embodiments of the present invention which includes a piezoelectric perovskite oxide disposed on a substrate and a shape memory alloy component disposed on the piezoelectric perovskite oxide. In particular embodiments of a MEMS device including a modular VCP, vibration is reduced by at least 50%.

Abstract: A Ni2Si-nSiC Ohmic contact is formed by pulsed laser ablation deposition (PLD) of Ni2Si source target deposited on a n-SiC substrate or SiC substrate wafer with SiC epilayer. The Ni2Si Ohmic contact on n-SiC was rapid thermal annealed at 950° C. for 30 s in a N2 ambient. The resultant Ohmic contact is characterized by excellent current-voltage (I-V) characteristics, an abrupt void free contact-SiC interface, retention of the PLD as-deposited contact layer width, smooth surface morphology, and absence of residual carbon within the contact layer or at the interface. The detrimental effects of contact delamination due to stress associated with interfacial voiding; and wire bond failure, non-uniformity of current flow and SiC polytype alteration due to extreme surface roughness; have been eliminated as has electrical instability associated with carbon inclusions at the contact-SiC interface, after prolonged high temperature and power device operation.

Abstract: A composite Pt/Ti/WSi/Ni Ohmic contact has been fabricated by a physical deposition process which uses electron beam evaporation and dc-sputter deposition. The Ni based composite Ohmic contact on n-Sic is rapid thermally annealed (RTA) at 950° C. to 1000° C. for 30 s to provide excellent current-voltage characteristics, an abrupt, void free contact-SiC interface, retention of the as-deposited contact layer width, smooth surface morphology and an absence of residual carbon within the contact layer and/or at the Ohmic contact-SiC interface. The annealed produced Ni2Si interfacial phase is responsible for the superior electrical integrity of the Ohmic contact to n-SiC. The effects of contact delamination due to stress associated with interfacial voiding has been eliminated. Wire bonding failure, non-uniform current flow and SiC polytype alteration due to extreme surface roughness have also been abolished.

Abstract: A test apparatus and method is provided for dynamic thermal and electrical fatigue testing of a semiconductor in an operating environment, such as air, that mimic thermal and electrical stress in the semiconductor during high power switching in the operating environment. Comparisons of pre- and post-testing electrical measurements, i.e., current, voltage and contact resistance, are combined to provide an indicator or long-term reliability.

Abstract: A dielectric thin film material and method of preparation in which precursors are provided to form barium strontium titanate with lanthanum (La) added as a dopant. The precursors and La dopant are mixed with a solvent forming a solution which is deposited on a substrate to form a continuous film composition. In various embodiments, the dielectric thin film has a composition of (1-y)Ba0.6Sr0.4TiO3−(y)La, where y=0 to 10-mol. The thin film material has dielectric and insulating properties suitable for tunable microwave applications.

Abstract: A method of deposition of a microwave frequency paraelectric BST-based thin film on a SiC substrate provides a resulting thin film-substrate structure which has no interfacial phases or element/chemical interdiffusion. For physical vapor deposition of the thin film, at least one of (i) thermally stable, refractory semiconductor substrate material is heat-treated during film deposition and (ii) the film-substrate structure is post-deposition heat treated, e.g., annealed, to achieve high quality film crystallinity with a fully developed film microstructure having desired microwave dielectric and insulating properties. For chemical solution deposition, the thin film is deposited onto a thermally stable, refractory semiconductor substrate material and is post-deposition heat treated to achieve a high quality film with a fully developed film microstructure having desired microwave dielectric and insulating properties.

Abstract: A composite Pt/Ti/WSi/Ni Ohmic contact has been fabricated by a physical deposition process which uses electron beam evaporation and dc-sputter deposition. The Ni based composite Ohmic contact on n-SiC is rapid thermally annealed (RTA) at 950° C. to 1000° C. for 30s to provide excellent current-voltage characteristics, an abrupt, void free contact-SiC interface, retention of the as-deposited contact layer width, smooth surface morphology and an absence of residual carbon within the contact layer and/or at the Ohmic contact-SiC interface. The annealed produced Ni2Si interfacial phase is responsible for the superior electrical integrity of the Ohmic contact to n-SiC. The effects of contact delamination due to stress associated with interfacial voiding has been eliminated. Wire bonding failure, non-uniform current flow and SiC polytype alteration due to extreme surface roughness have also been abolished.

Abstract: This invention is directed to pure and modified Ta2O5 thin films deposited on suitable substrates and methods for making these Ta2O5 thin films. These Ta2O5 thin films exhibit superior properties for microwave communication, dynamic random access memory and integrated electronic applications. The Ta2O5 thin films perform well in these types of technologies due to the Ta2O5 thin film component which allows for high dielectric constants, low dielectric loss, and good temperature and frequency stability, thus making them particularly useful in high frequency microwave applications.