Abstract: A USB system includes at least one USB hub, a USB Compound Device, and at least one USB dummy device which is connected to a downstream port of the USB hub. The USB compound device includes an upstream port, a plurality of USB devices and a control unit for setting the states of the plurality of USB devices, wherein when the state of one of the plurality of USB devices is ‘on’ and the USB device has not been assigned an address, the USB device is capable of setting its address according to a received assigning address packet.

Abstract: A USB system includes at least one USB hub, a USB Compound Device, and at least one USB dummy device which is connected to a downstream port of the USB hub. The USB compound device includes an upstream port, a plurality of USB devices and a control unit for setting the states of the plurality of USB devices, wherein when the state of one of the plurality of USB devices is ‘on’ and the USB device has not been assigned an address, the USB device is capable of setting its address according to a received assigning address packet.

Abstract: A microprocessor system capable of software debug includes a host computer for executing remote debug, and a program memory for storing a monitor program for proving monitoring of the host computer and a user program. At least one break point address holder temporarily stores a break point address from the host computer. A break point comparator unit is connected to the break point address holder for comparing the break point address from the break point address holder with an address of the user program being executed, and for outputting an interrupt control signal when the addresses match. A controller controls the break point comparator unit, and a microprocessor is electrically connected to the host computer.

Abstract: A microprocessor uses an interrupt signal for terminating a power-down mode, and a method thereof is used for controlling a clock signal related to the power-down mode. The microprocessor has a clock control unit for controlling whether a clock signal is outputted from a clock generator to the microprocessor, a first control unit which outputs a first control signal to the clock control unit when being level-triggered by an interrupt signal, and a second control unit which outputs a second control signal to the clock control unit for activating a power-down mode. The method includes (a) generating the second control signal to stop the clock generator from outputting the clock signal to the microprocessor, and (b) generating the interrupt signal to trigger the corresponding first control signal for terminating the power-down mode and actuating the clock generator to output the clock signal to the microprocessor after performing step (a).

Abstract: A microprocessor uses an interrupt signal for terminating a power-down mode, and a method thereof is used for controlling a clock signal related to the power-down mode. The microprocessor has a clock control unit for controlling whether a clock signal is outputted from a clock generator to the microprocessor, a first control unit which outputs a first control signal to the clock control unit when being level-triggered by an interrupt signal, and a second control unit which outputs a second control signal to the clock control unit for activating a power-down mode. The method includes (a) generating the second control signal to stop the clock generator from outputting the clock signal to the microprocessor, and (b) generating the interrupt signal to trigger the corresponding first control signal for terminating the power-down mode and actuating the clock generator to output the clock signal to the microprocessor after performing step (a).