Patents by Inventor Meng Dai

Meng Dai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240177956
    Abstract: A DC relay for anti-short circuit current and arc extinction includes two static contact leading-out ends, a movable contact piece in a straight sheet type, a pushing rod assembly, a fixed upper yoke, a follow-up yoke and a lower armature. The fixed upper yoke is fixed above the movable contact piece, corresponding to a position between the two movable contacts. The follow-up upper yoke is fixed on the pushing rod assembly, above the movable contact piece, corresponding to a position between the two movable contacts. The lower armature is fixed on a bottom end face of the movable contact piece. The fixed upper yoke, the follow-up upper yoke and the lower armature are respectively arranged in a width direction of the movable contact piece, and two magnetic conductive loops are formed in the width direction of the movable contact piece.
    Type: Application
    Filed: December 30, 2020
    Publication date: May 30, 2024
    Inventors: Shuming ZHONG, Wenguang DAI, Meng WANG
  • Patent number: 11990089
    Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, and a shift register unit, a first clock signal line, and a second clock signal line that are provided on the base substrate. The shift register unit includes an input circuit, an output circuit, a first control circuit, a second control circuit, and an output control circuit, and the second control circuit includes a first noise reduction transistor and a second noise reduction transistor; and the input circuit includes an input transistor, the input transistor and the first noise reduction transistor are sequentially arranged in the first direction, and an imaginary line of a channel region of the first noise reduction transistor extending in the second direction does not intersect with an imaginary line of an active layer of the input transistor extending in the second direction.
    Type: Grant
    Filed: June 26, 2023
    Date of Patent: May 21, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pengfei Yu, Lu Bai, Jie Dai, Mengqi Wang, Huijun Li, Yupeng He, Hao Zhang, Meng Zhang, Xin Zhang
  • Patent number: 11990090
    Abstract: A display substrate and an electronic device are provided. The display substrate includes a base substrate, including a display region and a peripheral region on at least one side of the display region; and a shift register unit and a first clock signal line in the peripheral region of the base substrate, wherein the first clock signal line extends along a first direction on the base substrate, and is connected to a first clock signal terminal to be configured to provide a first clock signal to the shift register unit; the shift register unit includes an input circuit, an output circuit, a first control circuit, and an output control circuit; the output control circuit includes an output control transistor and a first capacitor, and the output circuit includes an output transistor and a second capacitor.
    Type: Grant
    Filed: June 26, 2023
    Date of Patent: May 21, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pengfei Yu, Lu Bai, Jie Dai, Mengqi Wang, Huijun Li, Yupeng He, Hao Zhang, Meng Zhang, Xin Zhang
  • Publication number: 20240145188
    Abstract: A high-voltage DC relay with permanent magnet arc extinguishing function includes two static contact leading-out terminals having static contacts; a movable contact piece having movable contacts; first permanent magnets around the movable contact piece, wherein a side having polarity of the first permanent magnets faces the contacts such that arc extinction is implemented using a horizontal magnetic field formed by the first permanent magnets; and third permanent magnets provided on the static contact leading-out terminals, the polarity of the sides facing the contacts of the third permanent magnets is opposite to that of the first permanent magnets such that magnetic field strength at the contacts can be enhanced by a longitudinal magnetic field formed by the first and the third permanent magnets, and arc extinction can be implemented.
    Type: Application
    Filed: February 8, 2022
    Publication date: May 2, 2024
    Inventors: Wenguang DAI, Liji SU, Wenhao HUA, Songsheng CHEN, Meng WANG, Yaoshan HONG
  • Patent number: 11972186
    Abstract: A method of designing an integrated circuit (IC) device includes identifying, with a processor, a pin failing a test to determine an antenna effect, identifying, with the processor, a net corresponding to the identified pin failing the test to determine the antenna effect, and creating, with the processor, an engineering change order (ECO) script based on the identified net to insert a diode to address the antenna effect.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: April 30, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY, LIMITED
    Inventors: Qiuyuan Wu, Shuang Dai, Chia-Chun Liao, Meng-Hsuan Wu
  • Publication number: 20240135873
    Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of reset signal lines. The base substrate includes a display region which includes sub-pixels arranged in array, each sub-pixels includes a pixel driving circuit and a light-emitting element. The plurality of reset signal lines extends in a first direction and include a plurality of first reset signal lines for providing a first reset signal and a plurality of second reset signal lines for providing a second reset signal, and one of the plurality of first reset signal lines and one of the plurality of second reset signal lines are respectively connected to pixel driving circuits of a plurality of sub-pixels located in a same row. A layer where the plurality of first reset signal lines are located is different from layers where the plurality of second reset signal lines are located.
    Type: Application
    Filed: June 9, 2021
    Publication date: April 25, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Kaipeng SUN, Binyan WANG, Feng WEI, Meng LI, Tianyi CHENG, Lina WANG, Cong LIU, Shiqian DAI
  • Publication number: 20240128038
    Abstract: A relay includes a contact container having a contact chamber, a pair of first through holes and a second through hole communicated with the contact chamber; a pair of static contact leading-out terminals passed through the first through holes and connected to the contact container; a connector passing through the second through hole and connected to the contact container; a first magnetizer provided in the contact chamber and connected to the connector; and a pushing rod assembly including a movable component with a movable contact piece. The movable component is movably provided in the contact chamber to make the movable contact piece come into contact with or separate from the pair of static contact leading-out terminals. The first magnetizer is arranged at a side of the movable contact piece facing the static contact leading-out terminals.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Inventors: Wenguang DAI, Songsheng CHEN, Meng WANG, Dapeng FU, Fegzhu XIE
  • Patent number: 11948500
    Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. In the display substrate, each signal line includes a first conductive portion; for at least one signal line, the display substrate includes a multi-layer insulating pattern on a side of the first conductive portion of each signal line away from the base substrate, and at least one insulating pattern covers a surface of a side of the first conductive portion away from the base substrate; a first insulating pattern in the multi-layer insulating pattern includes a hollow, and an orthographic projection of the hollow on the base substrate is at least partially in a region surrounded by an orthographic projection of the first conductive portion on the base substrate; and a material of the first insulating pattern includes an organic insulating material.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: April 2, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Cong Liu, Binyan Wang, Tianyi Cheng, Feng Wei, Meng Li, Shiqian Dai, Kaipeng Sun
  • Publication number: 20240096645
    Abstract: A SOI wafer is disclosed. The SOI wafer may be characterized by surface roughness of a top silicon layer of the SOI wafer is less than 4 ?, thickness uniformity of the top silicon layer is within ±1%, and a total number of particles on a surface of the top silicon layer of the SOI wafer, measured with setting of 37 nm of SPx detection threshold, is less than 100.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 21, 2024
    Applicants: Zing Semiconductor Corporation, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Xing WEI, Rongwang DAI, Ziwen WANG, Minghao LI, Hongtao XU, Meng CHEN
  • Publication number: 20240092925
    Abstract: Provided is a CD5-targeting fully human antibody or an antigen-binding fragment thereof, which specifically binds to CD5 with a high affinity, has a lower immunogenicity compared to heterologous antibodies, and has a good application potential in the development of antibody drugs, cell therapy drugs, detection reagents and the like.
    Type: Application
    Filed: January 12, 2022
    Publication date: March 21, 2024
    Applicant: Nanjing IASO Biotechnology Co., Ltd.
    Inventors: Taochao Tan, Qiaoe Wei, Xiangyin Jia, Jiayue Tan, Meng Xie, Zhenyu Dai
  • Publication number: 20240078977
    Abstract: A display substrate and a display apparatus are disclosed. The display substrate includes a base substrate including a display region and a peripheral region located on at least one side of the display region, and a first gate drive circuit, the first gate drive circuit includes a first clock signal line, a second clock signal line and N shift register units that are cascaded; each shift register unit of the N shift register units includes a first output circuit; the first output circuit includes the first output transistor, the orthographic projection of the second clock signal line on the base substrate is located between an orthographic projection of the first output transistor on the base substrate and the orthographic projection of the first clock signal line on the base substrate. The display substrate can reduce load of the first clock signal line and the second clock signal line.
    Type: Application
    Filed: July 23, 2021
    Publication date: March 7, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Binyan WANG, Cong LIU, Tianyi CHENG, Feng WEI, Meng LI, Shiqian DAI, Kaipeng SUN, Lina WANG
  • Publication number: 20230392085
    Abstract: A multi-phase combination reaction system has at least one fixed bed hydrogenation reactor. The fixed bed hydrogenation reactor has, arranged from top to bottom, a first hydrogenation reaction area, a gas-liquid separation area, a second hydrogenation reaction area and a third hydrogenation reaction area. The gas-liquid separation area is provided with a raw oil inlet. A hydrogen inlet is provided between the second hydrogenation reaction area and the third hydrogenation reaction area. The system is capable of simultaneously obtaining two fractions in one hydrogenation reactor.
    Type: Application
    Filed: October 22, 2021
    Publication date: December 7, 2023
    Inventors: Meng DAI, Shicai LI, Yang LI, Dahai XU, He DING, Guang CHEN, Han ZHANG, Jiawen ZHOU
  • Patent number: 11833327
    Abstract: A method of automatically initializing an analyte sensor for a user is disclosed here. A first analyte sensor is operated in a first measurement mode to generate first sensor signals indicative of an analyte level of the user. A second analyte sensor is deployed to measure the analyte level of the user, and is operated in an initialization mode, concurrently with operation of the first analyte sensor in the first measurement mode, to receive sensor configuration data generated by the first analyte sensor. During operation of the second analyte sensor in the initialization mode, the second analyte sensor is calibrated with at least some of the received sensor configuration data. After the calibrating, operation of the second analyte sensor is transitioned from the initialization mode to a second measurement mode during which the second analyte sensor generates second sensor signals indicative of the analyte level of the user.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: December 5, 2023
    Assignee: MEDTRONIC MINIMED, INC.
    Inventors: Erik Montero, David C. Antonio, Eric Allan Larson, Meng Dai Yu, Samuel Finney, Hans K. Wenstad, David M. Aguirre, Andrew P. Lynch, Andrea Varsavsky, Ali Dianaty
  • Publication number: 20220249594
    Abstract: A formulation of conjugates of tubulysin analogs with a cell-binding molecule having a structure represented by Formula (I), wherein T, L, m, n, ----, R1, R2, R3, R4, R1, R6, R7, R1, R9, R10, R11, R12, and R13 are as defined herein, can be used for targeted treatment of cancer, autoimmune disease, and infectious disease.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 11, 2022
    Applicant: HANGZHOU DAC BIOTECH CO., LTD
    Inventors: Robert ZHAO, Qingliang YANG, Yuanyuan HUANG, Shun GAI, Hangbo YE, Linyao ZHAO, Huihui GUO, Lu BAI, Wenjun LI, Junxiang JIA, Zhixiang GUO, Jun ZHENG, Xiaoxiao CHEN, Xiangfei KONG, Chen LIN, Yong DU, Yu ZHANG, Lei ZHOU, Xiuzhen ZHANG, Xiuhong ZHENG, Binbin CHEN, Yanlei YANG, Meng DAI, Yifang XU, Zhongliang FAN, Xiaomai ZHOU, Xingyan JIANG, Miaomiao CHEN, Lingli ZHANG, Yanhua LI
  • Publication number: 20210275742
    Abstract: A method of automatically initializing an analyte sensor for a user is disclosed here. A first analyte sensor is operated in a first measurement mode to generate first sensor signals indicative of an analyte level of the user. A second analyte sensor is deployed to measure the analyte level of the user, and is operated in an initialization mode, concurrently with operation of the first analyte sensor in the first measurement mode, to receive sensor configuration data generated by the first analyte sensor. During operation of the second analyte sensor in the initialization mode, the second analyte sensor is calibrated with at least some of the received sensor configuration data. After the calibrating, operation of the second analyte sensor is transitioned from the initialization mode to a second measurement mode during which the second analyte sensor generates second sensor signals indicative of the analyte level of the user.
    Type: Application
    Filed: March 6, 2020
    Publication date: September 9, 2021
    Inventors: Erik Montero, David C. Antonio, Eric Allan Larson, Meng Dai Yu, Samuel Finney, Hans K. Wenstad, David M. Aguirre, Andrew P. Lynch, Andrea Varsavsky, Ali Dianaty
  • Patent number: 9780084
    Abstract: An electrostatic discharge protection structure includes: substrate of a first type of conductivity, well region of a second type of conductivity, substrate contact region in the substrate and of the first type of conductivity, well contact region in the well region and of the second type of conductivity, substrate counter-doped region between the substrate contact region and the well contact region and of the second type of conductivity, well counter-doped region between the substrate contact region and the well contact region and of the first type of conductivity, communication region at a lateral junction between the substrate and the well region, first isolation region between the substrate counter-doped region and the communication region, second isolation region between the well counter-doped region and the communication region, oxide layer having one end on the first isolation region and another end on the substrate, and field plate structure on the oxide layer.
    Type: Grant
    Filed: February 28, 2016
    Date of Patent: October 3, 2017
    Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.
    Inventors: Yonghai Hu, Meng Dai, Zhongyu Lin, Guangyang Wang
  • Patent number: 9683938
    Abstract: A scanning system for fluorescent imaging includes a sample holder configured to hold a sample therein, the sample holder defining a sample holding region. A scanner head spans the sample holding region and is movable relative to the sample holder. An array of light sources is disposed on an opposing side of the sample holder and is angled relative thereto. Respective controller are operably coupled to the scanner head and the array of light sources, wherein one controller selectively actuates a one or more rows of the array of light sources and another controller controls movement of the scanner head to capture fluorescent light emitted from within the sample holder in response to illumination from the actuated light sources. A filter designed to filter out scattered light from the sample may be interposed between the sample holder and the scanner head.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: June 20, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Aydogan Ozcan, Zoltan Gorocs, Yuye Ling, Meng Dai Yu
  • Patent number: 9520488
    Abstract: Various embodiments provide SCR ESD protection devices and methods for forming the same. An exemplary device includes a semiconductor substrate having a P-type well region, an N-type well region adjacent to the P-type well region, a first P-type doped region and a first N-type doped region in the P-type well region, and a second N-type doped region and a second P-type doped region in the N-type well region. A first center-doped region and a second center-doped region doped with impurity ions of a same type are located between the first N-type doped region and the second P-type doped region and extend across the P-type well region and the N-type well region. The first center-doped region is located within the second center-doped region, has a doping concentration higher than a doping concentration in the second center-doped region, and has a depth smaller than a depth of the second center-doped region.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: December 13, 2016
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: Meng Dai
  • Publication number: 20160181237
    Abstract: An electrostatic discharge protection structure includes: substrate of a first type of conductivity, well region of a second type of conductivity, substrate contact region in the substrate and of the first type of conductivity, well contact region in the well region and of the second type of conductivity, substrate counter-doped region between the substrate contact region and the well contact region and of the second type of conductivity, well counter-doped region between the substrate contact region and the well contact region and of the first type of conductivity, communication region at a lateral junction between the substrate and the well region, first isolation region between the substrate counter-doped region and the communication region, second isolation region between the well counter-doped region and the communication region, oxide layer having one end on the first isolation region and another end on the substrate, and field plate structure on the oxide layer.
    Type: Application
    Filed: February 28, 2016
    Publication date: June 23, 2016
    Inventors: Yonghai Hu, Meng Dai, Zhongyu Lin, Guangyang Wang
  • Publication number: 20160161409
    Abstract: A scanning system for fluorescent imaging includes a sample holder configured to hold a sample therein, the sample holder defining a sample holding region. A scanner head spans the sample holding region and is movable relative to the sample holder. An array of light sources is disposed on an opposing side of the sample holder and is angled relative thereto. Respective controller are operably coupled to the scanner head and the array of light sources, wherein one controller selectively actuates a one or more rows of the array of light sources and another controller controls movement of the scanner head to capture fluorescent light emitted from within the sample holder in response to illumination from the actuated light sources. A filter designed to filter out scattered light from the sample may be interposed between the sample holder and the scanner head.
    Type: Application
    Filed: June 20, 2014
    Publication date: June 9, 2016
    Applicant: The Regents of the University of California
    Inventors: Aydogan Ozcan, Zoltan Gorocs, Yuye Ling, Meng Dai Yu