Abstract: Glasses with gesture recognition function include a glasses frame and a gesture recognition system. The gesture recognition system is disposed on the glasses frame and configured to detect hand gestures in front of the glasses thereby generating a control command. The gesture recognition system transmits the control command to an electronic device to correspondingly control the electronic device.

Abstract: Disclosed in the present invention is an anti-Nipah virus monoclonal antibody having neutralization activity. The antibody consists of a monkey-derived variable region and a human constant region, and both light and heavy chains of the monkey-derived variable region have unique CDR regions. The antibody provided by the present invention has an excellent antigen binding capability, and has good binding activity with Bangladesh Nipah virus and Malaysia Nipah virus glycoprotein G. The antibody can effectively neutralize the Nipahpseudovirus. Moreover, the neutralization activity of the antibody is enhanced as the concentration of the antibody increases, and nearly 100% neutralization of the Nipahpseudovirus can be achieved at a concentration of 1 ?g/mL. Also disclosed in the present invention is an application of the monoclonal antibody against the Nipah virus glycoprotein G in preparation of a Nipah virus treatment drug.

Abstract: Embodiments of the present disclosure relates to a semiconductor device structure. The structure includes a source/drain epitaxial feature disposed over a substrate, a first interlayer dielectric (ILD) disposed over the source/drain epitaxial feature, a second ILD disposed over the first ILD. The second ILD includes a first dopant species having an atomic radius equal to or greater than silicon and a second dopant species having an atomic mass less than 15. The structure also includes a first conductive feature disposed in the second ILD, and a second conductive feature disposed over the source/drain epitaxial feature, the second conductive feature extending through the first ILD and in contact with the first conductive feature.

Abstract: An electronic package is provided, in which an electronic module including a first electronic element and a second electronic element is disposed on a carrier structure embedded with a third electronic element, and the third electronic element is a photonic chip electrically connected to the electronic module. Therefore, with this configuration, it is beneficial to reduce a layout area of the carrier structure to meet the requirement of miniaturization.

Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.

Abstract: A method includes the following steps. A photoresist is exposed to a first light-exposure through a first mask, wherein the first mask includes a first stitching region, and a first portion of the photoresist corresponding to a first opaque portion of the first stitching region is unexposed. The photoresist is exposed to a second light-exposure through a second mask, wherein the second mask includes a second stitching region, and a second portion of the photoresist corresponding to a second opaque portion of the second stitching region is unexposed and is overlapping with the first portion of the photoresist.

Abstract: Glasses with gesture recognition function include a glasses frame and a gesture recognition system. The gesture recognition system is disposed on the glasses frame and configured to detect hand gestures in front of the glasses thereby generating a control command. The gesture recognition system transmits the control command to an electronic device to correspondingly control the electronic device.

Abstract: A calibration apparatus includes a processor, an alignment device, and an arm. The alignment device captures images in a three-dimensional space, and a tool is arranged on a flange of the arm. The processor records a first matrix of transformation between an end-effector coordinate-system and a robot coordinate-system, and performs a tool calibration procedure according to the images captured by the alignment device for obtaining a second matrix of transformation between a tool coordinate-system and the end-effector coordinate-system. The processor calculates relative position of a tool center point of the tool in the robot coordinate-system based on the first and second matrixes, and controls the TCP to move in the three-dimensional space for performing a positioning procedure so as to regard points in an alignment device coordinate-system as points of the TCP, and calculates the relative positions of points in the alignment device coordinate-system and in the robot coordinate-system.

Abstract: A method for forming a package structure is provided. The method includes forming first conductive structures and a first semiconductor die on a same side of a redistribution structure. The method includes forming an interposer substrate over the redistribution structure, wherein the first semiconductor die is between the interposer substrate and the redistribution structure, and edges of the interposer substrate extend beyond edges of the first semiconductor die. The method includes forming a second semiconductor die on the redistribution structure, wherein the first semiconductor die and the second semiconductor die are disposed on opposite sides of the redistribution structure.

Abstract: Structures and methods of forming fan-out packages are provided. The packages described herein may include a cavity substrate, one or more semiconductor devices located in a cavity of the cavity substrate, and one or more redistribution structures. Embodiments include a cavity preformed in a cavity substrate. Various devices, such as integrated circuit dies, packages, or the like, may be placed in the cavity. Redistribution structures may also be formed.

Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.

Abstract: The present disclosure provides a multi-state one-time programmable (MSOTP) memory circuit including a memory cell and a programming voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a writing state, the programming voltage driving circuit outputs a writing control potential to the gate of the MOS storage transistor, and when the memory cell is in a reading state, the programming voltage driving circuit outputs a reading control potential to the gate of the MOS storage transistor.

Abstract: Disclosed is a privacy-preserving neural network prediction system in the technical field of information security. The system includes a client, a server and a third party device. Off-line, the client, the server and the third party complete model parameter sharing through negotiation. Online, the client sends/shares input data to the server. The client and the server use a secure calculating protocol to jointly execute neural network prediction with privacy preservation. The server returns an obtained prediction result to the client, and the client reconstructs the prediction result. Only one round of communication interaction is required, and the amount of communication overhead is reduced, so that the communication efficiency significantly improves. The calculations in the present system may be based on a ring, rather than a domain. The present system also (re)customizes the offline protocol, which improves the offline efficiency and requires only a lightweight secret sharing operation.

Abstract: In one aspect, there is provided a method performed by one or more computers for privacy-sensitive assessment of digital component transmission reach based on cardinalities of subset unions of a collection of user sets, the method including: receiving a request to determine a number of users that are included in a target group of users that received at least one transmission of a digital component, where the request includes a set expression defined in terms of the collection of user sets, generating an alternative representation of the set expression in terms of primitive sets, applying a cardinality model to each primitive to generate a cardinality of each primitive set as a linear combination of cardinalities of subset unions of the collection of user sets, and determining the number of users included in the target group of users based on the cardinalities of the primitive sets.

Abstract: In one aspect, there is provided a method that includes: obtaining multiple input frequency histograms that each correspond to a respective transmission commitment, where a transmission commitment corresponds to a subset of publishers from a set of publishers; generating a frequency model based on the input frequency histograms, where the frequency model is a parametric model parameterized by a set of model parameters that include a correlation matrix with a respective correlation value for each pair of publishers from the set of publishers; receiving a request to predict a frequency histogram for a target transmission commitment corresponding to a target subset of publishers; generating a predicted frequency histogram for the target transmission commitment using the frequency model; and generating one or more predictions characterizing the target transmission commitment using the predicted frequency histogram.

Abstract: A method of clustering spatial data includes receiving a point cloud comprised of a plurality of points defined within three-dimensional (3D) space. The method further includes selecting one or more adaptable clustering parameters and traversing each of the plurality of points in the point cloud and selectively adding each of the points to one or more clusters based on the selected clustering parameters associated with each point.

Abstract: A fast Fourier transform (FFT) circuit of an audio processing device configured to perform an N-points FFT and including a memory circuit and a butterfly operation unit circuit is provided. The butterfly operation unit circuit reads two points input data from the memory circuit, performs a butterfly operation for the two points input data according to a twiddle factor to generate two points output data, and writes the two points output data into the memory circuit. The butterfly operation unit circuit includes a multiplier and a plurality of adders/subtractors. The multiplier sequentially multiplies real or imaginary coefficients of one of the two points input data by real or imaginary coefficients of the twiddle factor in multiple clock cycles. The multiplier performs a multiplication once in each clock cycle. The adders/subtractors perform addition/subtraction, such that the butterfly operation unit circuit generates the two points output data.

Abstract: A saddle pad display system, especially for equine use wherein a strap loop is mounted on the pad horizontally and the display is mounted via a pair of vertical loops. This system makes it easier to add and remove the display quickly and efficiently, ensuring repetitive results. This is especially useful for a competitor or exhibitor display number.