Patents by Inventor Meng-Heng LIN

Meng-Heng LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Resistive random access memory with high-reliability and manufacturing and control methods thereof
    Patent number: 9899078
    Abstract: A high-reliability resistive random access memory (RRAM). A memory cell of a memory cell array is controlled via a word line, a bit line and a source line. The control unit of the RRAM has a word line decoder, a bit line decoder, and a source line decoder and switch circuit. The word line decoder, the bit line decoder and the source line decoder respectively control the voltage applied to the word line, the voltage applied to the bit line, and the voltage applied to the source line. The switch circuit is switched between a first state and a second state to operate the bit line decoder to apply a voltage to the bit line to read the memory cell and to operate the source line decoder to apply a voltage to the source line to read the memory cell alternately.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: February 20, 2018
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Meng-Heng Lin, Bo-Lun Wu, Chien-Min Wu
  • RESISTIVE RANDOM ACCESS MEMORY AND MANUFACTURING AND CONTROL METHODS THEREOF
    Publication number: 20160148684
    Abstract: A high-reliability resistive random access memory (RRAM). A memory cell of a memory cell array is controlled via a word line, a bit line and a source line. The control unit of the RRAM has a word line decoder, a bit line decoder, and a source line decoder and switch circuit. The word line decoder, the bit line decoder and the source line decoder respectively control the voltage applied to the word line, the voltage applied to the bit line, and the voltage applied to the source line. The switch circuit is switched between a first state and a second state to operate the bit line decoder to apply a voltage to the bit line to read the memory cell and to operate the source line decoder to apply a voltage to the source line to read the memory cell alternately.
    Type: Application
    Filed: November 24, 2015
    Publication date: May 26, 2016
    Inventors: Meng-Heng LIN, Bo-Lun WU, Chien-Min WU
  • Method for forming memory device
    Patent number: 9231208
    Abstract: A method includes forming a resistance-switching layer and a second electrode over a first electrode. The method includes applying a forming voltage to the resistance-switching layer such that the resistance of the resistance-switching layer is decreased. The method includes applying an initial reset voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a first set voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The method includes applying a second reset voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a second set voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The second set voltage is lower than the first set voltage.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: January 5, 2016
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Meng-Heng Lin, Bo-Lun Wu
  • METHOD FOR FORMING MEMORY DEVICE
    Publication number: 20150287919
    Abstract: A method includes forming a resistance-switching layer and a second electrode over a first electrode. The method includes applying a forming voltage to the resistance-switching layer such that the resistance of the resistance-switching layer is decreased. The method includes applying an initial reset voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a first set voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The method includes applying a second reset voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a second set voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The second set voltage is lower than the first set voltage.
    Type: Application
    Filed: September 2, 2014
    Publication date: October 8, 2015
    Inventors: Meng-Heng LIN, Bo-Lun WU