Patents by Inventor MENG-KAI SHIH
MENG-KAI SHIH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230411349Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.Type: ApplicationFiled: August 29, 2023Publication date: December 21, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tang-Yuan CHEN, Meng-Kai SHIH, Teck-Chong LEE, Shin-Luh TARNG, Chih-Pin HUNG
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Patent number: 11742324Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.Type: GrantFiled: May 17, 2021Date of Patent: August 29, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Tang-Yuan Chen, Meng-Kai Shih, Teck-Chong Lee, Shin-Luh Tarng, Chih-Pin Hung
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Publication number: 20230011464Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The through via extends through the upper conductive structure, the intermediate layer and the lower conductive structure.Type: ApplicationFiled: September 13, 2022Publication date: January 12, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wen Hung HUANG, Meng-Kai SHIH, Wei-Hong LAI, Wei Chu SUN
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Patent number: 11375124Abstract: An optical measurement equipment includes an adjustment apparatus and at least two image capturing devices. The image capturing devices have a depth-of-field and attached to the adjustment apparatus. The image capturing devices are adjusted by the adjustment apparatus such that a portion to be measured of a workpiece is located within the depth-of-field of the image capturing devices.Type: GrantFiled: February 25, 2019Date of Patent: June 28, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Han Wang, Ian Hu, Meng-Kai Shih, Hsuan Yu Chen
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Patent number: 11217502Abstract: A semiconductor device package includes a substrate, an electronic component disposed on the substrate, a supporting structure disposed on the substrate and surrounding the electronic component, and a heat spreading structure disposed on the supporting structure. A length of the supporting structure and a length of the heat spreading structure are greater than a length of the substrate.Type: GrantFiled: November 6, 2019Date of Patent: January 4, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ian Hu, Meng-Kai Shih, Chih-Pin Hung
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Patent number: 11164756Abstract: The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate.Type: GrantFiled: March 9, 2020Date of Patent: November 2, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ying-Xu Lu, Tang-Yuan Chen, Jin-Yuan Lai, Tse-Chuan Chou, Meng-Kai Shih, Shin-Luh Tarng
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Publication number: 20210288024Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.Type: ApplicationFiled: May 17, 2021Publication date: September 16, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tang-Yuan CHEN, Meng-Kai SHIH, Teck-Chong LEE, Shin-Luh TARNG, Chih-Pin HUNG
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Patent number: 11011496Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.Type: GrantFiled: September 6, 2019Date of Patent: May 18, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Tang-Yuan Chen, Meng-Kai Shih, Teck-Chong Lee, Shin-Luh Tarng, Chih-Pin Hung
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Publication number: 20210134696Abstract: A semiconductor device package includes a substrate, an electronic component disposed on the substrate, a supporting structure disposed on the substrate and surrounding the electronic component, and a heat spreading structure disposed on the supporting structure. A length of the supporting structure and a length of the heat spreading structure are greater than a length of the substrate.Type: ApplicationFiled: November 6, 2019Publication date: May 6, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ian HU, Meng-Kai SHIH, Chih-Pin HUNG
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Patent number: 10985085Abstract: A thermal conductive device includes a first conductive plate, a second conductive plate, a plurality of wicks and a fluid. The first conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The second conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The first portion and the second portion of the first conductive plate are respectively connected to the first portion and the second portion of the second conductive plate to define a chamber. The plurality of wicks are disposed within the chamber. The fluid is disposed within the chamber.Type: GrantFiled: May 15, 2019Date of Patent: April 20, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ian Hu, Chih-Pin Hung, Meng-Kai Shih
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Publication number: 20210074676Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.Type: ApplicationFiled: September 6, 2019Publication date: March 11, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tang-Yuan CHEN, Meng-Kai SHIH, Teck-Chong LEE, Shin-Luh TARNG, Chih-Pin HUNG
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Patent number: 10861726Abstract: An apparatus includes: a first image capture module, a second image capture module, and a first projector. The first image capture module has a first optical axis forming an angle from approximately 70° to approximately 87° with respect to the surface of a carrier. The second image capture module has a first optical axis forming an angle of approximately 90° with respect to the surface of the carrier. The first projector has a first optical axis forming an angle from approximately 40° to approximately 85° with respect to the surface of the carrier.Type: GrantFiled: September 21, 2018Date of Patent: December 8, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chun Hung Tsai, Hsuan Yu Chen, Ian Hu, Meng-Kai Shih, Shin-Luh Tarng
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Publication number: 20200381345Abstract: A semiconductor device package includes a carrier, a conductive pillar and a first package body. The carrier has a first surface and a second surface opposite to the first surface. The conductive pillar is disposed on the second surface of the carrier. The first package is disposed on the second surface of the carrier and covers at least a portion of the conductive pillar. The conductive pillar has an uneven width.Type: ApplicationFiled: May 30, 2019Publication date: December 3, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yung-Shun CHANG, Teck-Chong LEE, Wei-Hong LAI, Meng-Kai SHIH
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Publication number: 20200381338Abstract: A semiconductor device package includes a carrier, an electronic component, a package body and a ring structure. The electronic component is disposed on the carrier. The electronic component has a side surface. The package body is disposed on the carrier. The package body exposes at least a portion of the side surface of the electronic component. The ring structure is disposed on the package body and surrounds the portion of the side surface of the electronic component exposed from the package body.Type: ApplicationFiled: June 3, 2019Publication date: December 3, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tang-Yuan CHEN, Yuan Tzuo LUO, Shao-Cheng YEN, Meng-Kai SHIH, Chih-Pin HUNG
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Publication number: 20200365485Abstract: A thermal conductive device includes a first conductive plate, a second conductive plate, a plurality of wicks and a fluid. The first conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The second conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The first portion and the second portion of the first conductive plate are respectively connected to the first portion and the second portion of the second conductive plate to define a chamber. The plurality of wicks are disposed within the chamber. The fluid is disposed within the chamber.Type: ApplicationFiled: May 15, 2019Publication date: November 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ian HU, Chih-Pin HUNG, Meng-Kai SHIH
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Patent number: 10840219Abstract: A semiconductor package structure includes: (1) a first substrate; (2) at least one first semiconductor element attached to the first substrate; and (3) a second substrate including a plurality of thermal vias and a plurality of conductive vias, wherein one end of each of the thermal vias directly contacts the first semiconductor element.Type: GrantFiled: June 6, 2019Date of Patent: November 17, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Bo-Syun Chen, Tang-Yuan Chen, Yu-Chang Chen, Jin-Feng Yang, Chin-Li Kao, Meng-Kai Shih
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Patent number: 10770369Abstract: A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a heat dissipation lid and a thermal isolation. The substrate has a surface. The first electronic component and the second electronic component are over the surface of the substrate and arranged along a direction substantially parallel to the surface. The first electronic component and the second electronic component are separated by a space therebetween. The heat dissipation lid is over the first electronic component and the second electronic component. The heat dissipation lid defines one or more apertures at least over the space between the first electronic component and the second electronic component. The thermal isolation is in the one or more apertures of the heat dissipation lid.Type: GrantFiled: August 24, 2018Date of Patent: September 8, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chih-Pin Hung, Tang-Yuan Chen, Jin-Feng Yang, Meng-Kai Shih
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Publication number: 20200279814Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The through via extends through the upper conductive structure, the intermediate layer and the lower conductive structure.Type: ApplicationFiled: February 28, 2019Publication date: September 3, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wen Hung HUANG, Meng-Kai SHIH, Wei-Hong LAI, Wei Chu SUN
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Publication number: 20200275030Abstract: An optical measurement equipment includes an adjustment apparatus and at least two image capturing devices. The image capturing devices have a depth-of-field and attached to the adjustment apparatus. The image capturing devices are adjusted by the adjustment apparatus such that a portion to be measured of a workpiece is located within the depth-of-field of the image capturing devices.Type: ApplicationFiled: February 25, 2019Publication date: August 27, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming-Han WANG, Ian HU, Meng-Kai SHIH, Hsuan Yu CHEN
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Publication number: 20200211863Abstract: The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate.Type: ApplicationFiled: March 9, 2020Publication date: July 2, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ying-Xu LU, Tang-Yuan CHEN, Jin-Yuan LAI, Tse-Chuan CHOU, Meng-Kai SHIH, Shin-Luh TARNG