Patents by Inventor Mercedes Gil

Mercedes Gil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8648834
    Abstract: Various embodiments of a low-power-consumption analog-to-digital converter (“ADC”) for a touchscreen or touch panel in a capacitive sensing system are disclosed. The ADC is configured to operate in a first mode or a second mode. The first mode is characterized by a first resolution having a first number of ADC bits and a first level of power consumption associated therewith. The second mode is characterized by a second resolution having a second number of bits and a second level of power consumption associated therewith. The ADC operates under control of the controller and is configured such that the first number of bits is greater than the second number of bits and the first power level is greater than the second power level. The controller causes the ADC to switch from operating in the first mode to operating in the second mode when low radio frequency (RF) noise conditions are detected by sense circuitry, the ADC and/or the controller.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: February 11, 2014
    Assignee: Pixart Imaging, Inc.
    Inventors: Jerome D. Wong, Mercedes Gil, Zhi Zhong Huang, Xu Zhang, Xiao Yan Zheng
  • Publication number: 20120293444
    Abstract: Various embodiments of a low-power-consumption analog-to-digital converter (“ADC”) for a touchscreen or touch panel in a capacitive sensing system are disclosed. The ADC is configured to operate in a first mode or a second mode. The first mode is characterized by a first resolution having a first number of ADC bits and a first level of power consumption associated therewith. The second mode is characterized by a second resolution having a second number of bits and a second level of power consumption associated therewith. The ADC operates under control of the controller and is configured such that the first number of bits is greater than the second number of bits and the first power level is greater than the second power level. The controller causes the ADC to switch from operating in the first mode to operating in the second mode when low radio frequency (RF) noise conditions are detected by sense circuitry, the ADC and/or the controller.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Applicant: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Jerome D. Wong, Mercedes Gil, Zhi Zhong Huang, Xu Zhang, Xiao Yan Zheng
  • Patent number: 7209476
    Abstract: A networking system includes a plurality of ports, each adapted to send and receive data. A switch core has a first channel configured to receive a logical input flow from each of the plurality of input ports, and has a second channel configured to receive a raw input flow from each of the plurality of input ports. Each logical input flow is carried by its corresponding raw input flow. A plurality of port mirrors are selectable from the plurality of ports. Each of the plurality of port mirrors is configured to produce a duplicate copy of at least one of the logical input flow and the raw input flow available at a selected port.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: April 24, 2007
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Ian Colloff, Norman Chou, Richard L. Schober, Mercedes Gil, Edmundo Rojas, Zhang Xiaoyang
  • Patent number: 7054330
    Abstract: A method and system to arbitrate between a plurality of resource requests are disclosed. In each arbitration within a current round of arbitration, a winning request is identified based on a priority associated with each requester participating in the arbitration and a set of values stored in a mask register. In response to identifying the winning request, a mask register value corresponding to a requestor of the winning request is updated to disqualify this requestor from further participation in the current round of arbitration. When the current round of arbitration completes, the set of values in the mask register is reset to allow each requestor to participate in the next round of arbitration. The current round of arbitration begins when each requester is qualified to participate in the current round of arbitration and completes when every participating requestor has been disqualified.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: May 30, 2006
    Inventors: Norman C. Chou, Yolin Lih, Mercedes Gil
  • Patent number: 6922749
    Abstract: An input port is described having an input policing unit that checks if a virtual lane has a sufficient number of credits to carry an input packet received by the input policing unit. The input port also has a request manager that generates a request for the packet to be switched by a switching core. The input port also has a packet Rx unit that stores the packet into a memory by writing blocks of data into the memory. The input port also has a packet Tx unit that receives a grant in response to the request and reads the packet from the memory in response to the grant by reading the blocks of data. The input port also has a pointer RAM manager that provides addresses for free blocks of data to said packet Rx unit and receives addresses of freed blocks of data from said packet Tx unit.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: July 26, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Mercedes Gil, Richard L. Schober, Ian Colloff
  • Patent number: 6763418
    Abstract: A method and system to arbitrate requests of a plurality of ports of an interconnect device are provided. Every port receives combined pending request data that includes a pending request indicator associated with each of the plurality of ports. Each pending request indicator specifies whether a corresponding port has a pending request that needs to be submitted to a request bus of the interconnect device. Further, at each port, a turn to submit a request to the request bus is allocated to one of the plurality of ports based on the combined pending request data, a set of values stored in a mask register and a priority scheme associated with the plurality of ports.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: July 13, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Norman C. Chou, Yolin Lih, Mercedes Gil