Patents by Inventor Meredith Reed

Meredith Reed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Terahertz Plasmonics for Testing Very Large-Scale Integrated Circuits under Bias
    Publication number: 20230393195
    Abstract: Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.
    Type: Application
    Filed: June 9, 2023
    Publication date: December 7, 2023
    Inventors: Greg Rupper, John Suarez, Sergey Rudin, Meredith Reed, Michael Shur
  • Terahertz plasmonics for testing very large-scale integrated circuits under bias
    Patent number: 11675002
    Abstract: Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: June 13, 2023
    Assignee: The Government of the United States, as represented by the Secretary of the Army
    Inventors: Greg Rupper, John Suarez, Sergey Rudin, Meredith Reed, Michael Shur
  • Terahertz Plasmonics for Testing Very Large-Scale Integrated Circuits under Bias
    Publication number: 20220011363
    Abstract: Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.
    Type: Application
    Filed: December 15, 2020
    Publication date: January 13, 2022
    Inventors: Greg Rupper, John Suarez, Sergey Rudin, Meredith Reed, Michael Shur
  • Terahertz plasmonics for testing very large-scale integrated circuits under bias
    Patent number: 10890618
    Abstract: Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: January 12, 2021
    Assignee: The Government of the United States, as represented by the Secretary of the Army
    Inventors: Greg Rupper, John Suarez, Sergey Rudin, Meredith Reed, Michael Shur
  • Terahertz Plasmonics for Testing Very Large-Scale Integrated Circuits under Bias
    Publication number: 20180238961
    Abstract: Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.
    Type: Application
    Filed: February 21, 2017
    Publication date: August 23, 2018
    Inventors: Greg Rupper, John Suarez, Sergey Rudin, Meredith Reed, Michael Shur