Patents by Inventor Mesut A. Ergin
Mesut A. Ergin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9829949Abstract: Methods and apparatus relating to adaptive interrupt coalescing for energy efficient mobile platforms are discussed herein. In one embodiment, one or more interrupts are buffered based on communication throughput. At least one of the one or more interrupts are released in response to expiration of an interrupt coalescing time period. Other embodiments are also claimed and described.Type: GrantFiled: June 28, 2013Date of Patent: November 28, 2017Assignee: Intel CorporationInventors: Alexander W. Min, Ren Wang, Jr-Shian Tsai, Mesut A. Ergin, Tsung-Yuan C. Tai
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Patent number: 9781209Abstract: Various embodiments are generally directed to techniques for improving the efficiency of exchanging packets between pairs of VMs within a communications server. An apparatus may include a processor component; a network interface to couple the processor component to a network; a virtual switch to analyze contents of at least one packet of a set of packets to be exchanged between endpoint devices through the network and the communications server, and to route the set of packets through one or more virtual servers of multiple virtual servers based on the contents; and a transfer component of a first virtual server of the multiple virtual servers to determine whether to route the set of packets to the virtual switch or to transfer the set of packets to a second virtual server of the multiple virtual servers in a manner that bypasses the virtual switch based on a routing rule.Type: GrantFiled: August 20, 2015Date of Patent: October 3, 2017Assignee: INTEL CORPORATIONInventors: Mesut A. Ergin, Jr-Shian Tsai, Janet Tseng, Ren Wang, Jun Nakajima, Tsung-Yuan Tai
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Patent number: 9740635Abstract: Computer-readable storage media, computing devices and methods associated with file cache management are discussed herein. In embodiments, a computing device may include a file cache and a file cache manager coupled with the file cache. The file cache manager may be configured to implement a context-aware eviction policy to identify a candidate file for deletion from the file cache, from a plurality of individual files contained within the file cache, based at least in part on file-level context information associated with the individual files. In embodiments, the file-level context information may include an indication of access recency and access frequency associated with the individual files. In such embodiments, identifying the candidate file for deletion from the file cache may be based, at least in part, on both the access recency and the access frequency of the individual files. Other embodiments may be described and/or claimed.Type: GrantFiled: March 12, 2015Date of Patent: August 22, 2017Assignee: Intel CorporationInventors: Ren Wang, Weishuang Zhao, Wei Shen, Michael P. Mesnier, Tsung-Yuan C. Tai, Mesut A. Ergin
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Patent number: 9733987Abstract: Examples may include techniques to coordinate the sharing of resources among virtual elements, including service chains, supported by a shared pool of configurable computing resources based on relative priority among the virtual element and service chains. Information including indications of the performance of the service chains and also the relative priority of the service chains may be received. The resource allocation of portions of the shared pool of configurable computing resources supporting the service chains can be adjusted based on the received performance and priority information.Type: GrantFiled: February 20, 2015Date of Patent: August 15, 2017Assignee: INTEL CORPORATIONInventors: Andrew J. Herdrich, Kapil Sood, Nrupal R. Jani, David J. Harriman, Mesut A. Ergin, Scott P. Dubal, Ravishankar Iyer
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Publication number: 20170206177Abstract: Embodiments of an invention interrupts between virtual machines are disclosed. In an embodiment, a processor includes an instruction unit and an execution unit, both implemented at least partially in hardware of the processor. The instruction unit is to receive an instruction to send an interrupt to a target virtual machine. The execution unit is to execute the instruction on a sending virtual machine without exiting the sending virtual machine. Execution of the instruction includes using a handle specified by the instruction to find a posted interrupt descriptor.Type: ApplicationFiled: January 15, 2016Publication date: July 20, 2017Inventors: Jr-Shian Tsai, Ravi L. Sahita, Mesut A. Ergin, Rajesh M. Sankaran, Gilbert Neiger, Jun Nakajima, Edwin Verplanke, Barry E. Huntley, Tsung-Yuan C. Tai
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Patent number: 9705849Abstract: Technologies for distributed detection of security anomalies include a computing device to establish a trusted relationship with a security server. The computing device reads one or more packets of at least one of an inter-virtual network function network or an inter-virtual network function component network in response to establishing the trusted relationship and performs a security threat assessment of the one or more packets. The computing device transmits the security threat assessment to the security server.Type: GrantFiled: October 13, 2014Date of Patent: July 11, 2017Assignee: Intel CorporationInventors: Kapil Sood, Mesut A. Ergin, John R. Fastabend, Shinae Woo, Jeffrey B. Shaw, Brian J. Skerry
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Publication number: 20170111382Abstract: Technologies for distributed detection of security anomalies include a computing device to establish a trusted relationship with a security server. The computing device reads one or more packets of at least one of an inter-virtual network function network or an inter-virtual network function component network in response to establishing the trusted relationship and performs a security threat assessment of the one or more packets. The computing device transmits the security threat assessment to the security server.Type: ApplicationFiled: December 31, 2016Publication date: April 20, 2017Inventors: Kapil Sood, Mesut A. Ergin, John R. Fastabend, Shinae Woo, Jeffrey B. Shaw, Brian J. Skerry
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Publication number: 20170054659Abstract: Various embodiments are generally directed to techniques for improving the efficiency of exchanging packets between pairs of VMs within a communications server. An apparatus may include a processor component; a network interface to couple the processor component to a network; a virtual switch to analyze contents of at least one packet of a set of packets to be exchanged between endpoint devices through the network and the communications server, and to route the set of packets through one or more virtual servers of multiple virtual servers based on the contents; and a transfer component of a first virtual server of the multiple virtual servers to determine whether to route the set of packets to the virtual switch or to transfer the set of packets to a second virtual server of the multiple virtual servers in a manner that bypasses the virtual switch based on a routing rule.Type: ApplicationFiled: August 20, 2015Publication date: February 23, 2017Applicant: Intel CorporationInventors: MESUT A. ERGIN, JR-SHIAN TSAI, JANET TSENG, REN WANG, JUN NAKAJIMA, TSUNG-YUAN TAI
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Publication number: 20170054658Abstract: Various embodiments are generally directed to techniques for improving the efficiency of exchanging packets among multiple VMs within a communications server, and between the communications server and other devices in a communications system. An apparatus may include a virtual switch to analyze contents of at least one packet of a set of packets to be exchanged between endpoint devices through a network, and to correlate the contents to a pathway to extend through one or more of the VMs that are each configured as virtual servers of multiple virtual servers; and an interface control component to select at least one virtual network interface of each of the one or more virtual servers along the pathway to operate in a polling mode, and to select a virtual network interface of at least one virtual server of the multiple virtual servers not along the pathway to operate in a non-polling mode.Type: ApplicationFiled: August 20, 2015Publication date: February 23, 2017Applicant: Intel CorporationInventors: ALEXANDER W. MIN, TSUNG-YUAN TAI, REN WANG, MESUT A. ERGIN, JR-SHIAN TSAI
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Patent number: 9513964Abstract: Systems and methods of managing break events may provide for detecting a first break event from a first event source and detecting a second break event from a second event source. In one example, the event sources can include devices coupled to a platform as well as active applications on the platform. Issuance of the first and second break events to the platform can be coordinated based on at least in part runtime information associated with the platform.Type: GrantFiled: December 26, 2014Date of Patent: December 6, 2016Assignee: Intel CorporationInventors: Ren Wang, Jr-Shian Tsai, Tsung-Yuan C. Tai, Mesut A. Ergin, Prakash N. Iyer, Bruce L. Fleming
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Patent number: 9507403Abstract: Systems and methods may provide for conducting a reward determination for a plurality of sleep states to obtain a plurality of reward determinations with respect to a device. In addition, a sleep state may be selected for the device from the plurality of sleep states based at least in part on the plurality of reward determinations. In one example, false entry and missed opportunity probabilities may be determined for stochastic interrupts, wherein the reward determination is conducted based at least in part on the false entry and missed opportunity probabilities.Type: GrantFiled: December 27, 2011Date of Patent: November 29, 2016Assignee: Intel CorporationInventors: Alexander W. Min, Ren Wang, Jr-Shian Tsai, Mesut A. Ergin, Tsung-Yuan C. Tai, Rajith K. Mavila, Prakash N. Iyer
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Patent number: 9454497Abstract: Technologies for secure inter-virtual-machine shared memory communication include a computing device with hardware virtualization support. A virtual machine monitor (VMM) authenticates a view switch component of a target virtual machine. The VMM adds configures a secure memory view to access a shared memory segment. The shared memory segment may include memory pages of a source virtual machine or the VMM. The view switch component switches to the secure memory view without generating a virtual machine exit event, using the hardware virtualization support. The view switch component may switch to the secure memory view by modifying an extended page table (EPT) pointer. The target virtual machine accesses the shared memory segment via the secure memory view. The target virtual machine and the source virtual machine may coordinate ownership of memory pages using a secure view control structure stored in the shared memory segment. Other embodiments are described and claimed.Type: GrantFiled: August 15, 2014Date of Patent: September 27, 2016Assignee: Intel CorporationInventors: Jun Nakajima, Jr-Shian Tsai, Ravi L. Sahita, Mesut A. Ergin, Edwin Verplanke, Rashmin N. Patel, Alexander W. Min, Ren Wang, Tsung-Yuan C. Tai
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Publication number: 20160267020Abstract: Computer-readable storage media, computing devices and methods associated with file cache management are discussed herein. In embodiments, a computing device may include a file cache and a file cache manager coupled with the file cache. The file cache manager may be configured to implement a context-aware eviction policy to identify a candidate file for deletion from the file cache, from a plurality of individual files contained within the file cache, based at least in part on file-level context information associated with the individual files. In embodiments, the file-level context information may include an indication of access recency and access frequency associated with the individual files. In such embodiments, identifying the candidate file for deletion from the file cache may be based, at least in part, on both the access recency and the access frequency of the individual files. Other embodiments may be described and/or claimed.Type: ApplicationFiled: March 12, 2015Publication date: September 15, 2016Inventors: Ren Wang, Weishuang Zhao, Wei Shen, Michael P. Mesnier, Tsung-Yuan C. Tai, Mesut A. Ergin
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Publication number: 20160246652Abstract: Examples may include techniques to coordinate the sharing of resources among virtual elements, including service chains, supported by a shared pool of configurable computing resources based on relative priority among the virtual element and service chains. Information including indications of the performance of the service chains and also the relative priority of the service chains may be received. The resource allocation of portions of the shared pool of configurable computing resources supporting the service chains can be adjusted based on the received performance and priority information.Type: ApplicationFiled: February 20, 2015Publication date: August 25, 2016Inventors: ANDREW J. HERDRICH, KAPIL SOOD, NRUPAL R. JANI, DAVID J. HARRIMAN, MESUT A. ERGIN, SCOTT P. DUBAL, RAVISHANKAR IYER
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Publication number: 20160188474Abstract: Methods and apparatus implementing Hardware/Software co-optimization to improve performance and energy for inter-VM communication for NFVs and other producer-consumer workloads. The apparatus include multi-core processors with multi-level cache hierarchies including and L1 and L2 cache for each core and a shared last-level cache (LLC). One or more machine-level instructions are provided for proactively demoting cachelines from lower cache levels to higher cache levels, including demoting cachelines from L1/L2 caches to an LLC. Techniques are also provided for implementing hardware/software co-optimization in multi-socket NUMA architecture system, wherein cachelines may be selectively demoted and pushed to an LLC in a remote socket. In addition, techniques are disclosure for implementing early snooping in multi-socket systems to reduce latency when accessing cachelines on remote sockets.Type: ApplicationFiled: December 26, 2014Publication date: June 30, 2016Applicant: Intel CorporationInventors: Ren Wang, Andrew J. Herdrich, Yen-cheng Liu, Herbert H. Hum, Jong Soo Park, Christopher J. Hughes, Namakkal N. Venkatesan, Adrian C. Moga, Aamer Jaleel, Zeshan A. Chishti, Mesut A. Ergin, Jr-shian Tsai, Alexander W. Min, Tsung-yuan C. Tai, Christian Maciocco, Rajesh Sankaran
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Publication number: 20160094573Abstract: Technologies for distributed detection of security anomalies include a computing device to establish a trusted relationship with a security server. The computing device reads one or more packets of at least one of an inter-virtual network function network or an inter-virtual network function component network in response to establishing the trusted relationship and performs a security threat assessment of the one or more packets. The computing device transmits the security threat assessment to the security server.Type: ApplicationFiled: October 13, 2014Publication date: March 31, 2016Inventors: Kapil Sood, Mesut A. Ergin, John R. Fastabend, Shinae Woo, Jeffrey B. Shaw, Brian J. Skerry
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Patent number: 9292073Abstract: Systems and methods may provide for determining an absolute energy break-even time for a first low power state with respect to a current state of a system. A relative energy break-even time may also be determined for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time. In addition, an operating state may be selected for the system based on at least in part the relative energy break-even time.Type: GrantFiled: November 29, 2012Date of Patent: March 22, 2016Assignee: Intel CorporationInventors: Ren Wang, Christian Maciocco, Jr-Shian Tsai, Rajeev D. Muralidhar, Harinarayanan Seshadri, Tsung-Yuan Tai, Mesut A. Ergin, Alexander W. Min
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Publication number: 20160048464Abstract: Technologies for secure inter-virtual-machine shared memory communication include a computing device with hardware virtualization support. A virtual machine monitor (VMM) authenticates a view switch component of a target virtual machine. The VMM adds configures a secure memory view to access a shared memory segment. The shared memory segment may include memory pages of a source virtual machine or the VMM. The view switch component switches to the secure memory view without generating a virtual machine exit event, using the hardware virtualization support. The view switch component may switch to the secure memory view by modifying an extended page table (EPT) pointer. The target virtual machine accesses the shared memory segment via the secure memory view. The target virtual machine and the source virtual machine may coordinate ownership of memory pages using a secure view control structure stored in the shared memory segment. Other embodiments are described and claimed.Type: ApplicationFiled: August 15, 2014Publication date: February 18, 2016Inventors: Jun Nakajima, Jr-Shian Tsai, Ravi L. Sahita, Mesut A. Ergin, Edwin Verplanke, Rashmin N. Patel, Alexander W. Min, Ren Wang, Tsung-Yuan C. Tai
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Patent number: 9253793Abstract: Methods and systems may provide for determining quality of service (QoS) information for a job associated with an application, and determining a condition prediction for a wireless channel of a mobile platform. Additionally, the job may be scheduled for communication over the wireless channel based at least in part on the QoS information and the condition prediction. In one example, scheduling the job includes imposing a delay in the communication if the condition prediction indicates that a throughput of the wireless channel is below a threshold and the delay complies with a latency constraint of the QoS information.Type: GrantFiled: December 19, 2012Date of Patent: February 2, 2016Assignee: Intel CorporationInventors: Ren Wang, Alexander W. Min, Jr-Shian Tsai, Tsung-Yuan C. Tai, Mesut A. Ergin
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Publication number: 20150212564Abstract: Methods and apparatus relating to adaptive interrupt coalescing for energy efficient mobile platforms are described. In one embodiment, one or more interrupts are buffered based on communication throughput. At least one of the one or more interrupts are released in response to expiration of an interrupt coalescing time period. Other embodiments are also claimed and disclosed.Type: ApplicationFiled: June 28, 2013Publication date: July 30, 2015Inventors: Alexander W. Min, Ren Wang, Jr-Shian Tsai, Mesut A. Ergin, Tsung-Yuan C. Tai