Patents by Inventor Metha Jeeradit

Metha Jeeradit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7433397
    Abstract: In a receive circuit within an integrated circuit device, a binary input signal is sampled in response to transitions of a sampling clock signal to generate a set of data samples. The binary input signal is additionally compared with first and second threshold levels to generate respective first and second edge samples. The phase of the sampling clock signal is adjusted based, at least in part, on the first edge sample if the set of data samples matches a first data pattern and based, at least in part, on the second edge sample if the set of data samples matches a second data pattern.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: October 7, 2008
    Assignee: Rambus Inc.
    Inventors: Bruno W. Garlepp, Jared L. Zerbe, Metha Jeeradit, Vladimir M. Stojanovic
  • Publication number: 20060233291
    Abstract: In a receive circuit within an integrated circuit device, a binary input signal is sampled in response to transitions of a sampling clock signal to generate a set of data samples. The binary input signal is additionally compared with first and second threshold levels to generate respective first and second edge samples. The phase of the sampling clock signal is adjusted based, at least in part, on the first edge sample if the set of data samples matches a first data pattern and based, at least in part, on the second edge sample if the set of data samples matches a second data pattern.
    Type: Application
    Filed: April 14, 2006
    Publication date: October 19, 2006
    Inventors: Bruno Garlepp, Jared Zerbe, Metha Jeeradit, Vladimir Stojanovic