Patents by Inventor Michael A. Huff

Michael A. Huff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9646878
    Abstract: A method is disclosed for manufacturing integrated circuits, microelectronics, micro-electro-mechanical systems (MEMS), nano-electro-mechanical systems (NEMS), photonic, and any micro- and nano-fabricated devices and systems designs that allow these designs to be kept secure. The manufacturing of the devices in the substrates is performed in a traditional manner at a foundry that can be located anywhere in the world., The manufacturing at this foundry is stopped just before the fabrication of the first layer of electrical interconnects. At this stage, the semiconductor substrates with the devices, minus electrical interconnects, are sent back to the design organization (or their designated trusted foundry) to perform the fabrication of the electrical interconnects to complete the entire manufacturing process.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: May 9, 2017
    Assignee: CORPORATION FOR NATIONAL RESEARCH INITIATIVES
    Inventor: Michael A. Huff
  • Publication number: 20170097108
    Abstract: A three-way (3-way) Micro-Electro-Mechanical Systems (MEMS)-based micro-valve device and method of fabrication for the implementation of a three-way MEMS-based micro-valve are disclosed. The micro-valve device has a wide range of applications, including medical, industrial control, aerospace, automotive, consumer electronics and products, as well as any application(s) requiring the use of three-way micro-valves for the control of fluids. The discloses three-way micro-valve device and method of fabrication that can be tailored to the requirements of a wide range of applications and fluid types, and can also use a number of different actuation methods, including actuation methods that have very small actuation pressures and energy densities even at higher fluidic pressures.
    Type: Application
    Filed: October 1, 2015
    Publication date: April 6, 2017
    Inventor: Michael A. Huff
  • Patent number: 9576773
    Abstract: A method or process is disclosed for etching deep, high-aspect ratio features into silicon dioxide material layers and substrates, including glass, fused silica, quartz, or similar materials, using a plasma etch technology. The method has application in the fabrication and manufacturing of MEMS, microelectronic, micro-mechanical, photonic and nanotechnology devices in which silicon dioxide material layers or substrates are used and must be patterned and etched. Devices that benefit from the method described in this invention include the fabrication of MEMS gyroscopes, resonators, oscillators, microbalances, accelerometers, for example. The etch method or process allows etch depths ranging from below 10 microns to over 1 millimeter and aspect ratios from less than 1 to 1 to over 10 to 1 with etched feature sidewalls having vertical or near vertical angles. Additionally, the disclosed method provides requirements of the etched substrates to reduce or eliminate undesired effects of an etch.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: February 21, 2017
    Assignee: CORPORATION FOR NATIONAL RESEARCH INITIATIVES
    Inventors: Michael A. Huff, Michael Pedersen
  • Patent number: 9536706
    Abstract: A dynamic pattern generator (DPG) device and method of making a DPG device are disclosed. The DPG device is used in semiconductor processing tools that require multiple electron-beams, such as direct-write lithography. The device is a self-aligned DPG device that enormously reduces the required tolerances for aligning the various electrode layers, as compared to other design configurations including the non-self-aligned approach and also greatly simplifies the process complexity and cost. A process sequence for both integrated and non-integrated versions of the self-aligned DPG device is described. Additionally, an advanced self-aligned DPG device that eliminates the need for a charge dissipating coating or layer to be used on the device is described. Finally, a fabrication process for the implementation of both integrated and non-integrated versions of the advanced self-aligned DPG device is described.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: January 3, 2017
    Assignee: CORPORATION FOR NATIONAL RESEARCH INITIATIVES
    Inventors: Michael A. Huff, Michael Pedersen
  • Publication number: 20160233054
    Abstract: A dynamic pattern generator (DPG) device and method of making a DPG device are disclosed. The DPG device is used in semiconductor processing tools that require multiple electron-beams, such as direct-write lithography. The device is a self-aligned DPG device that enormously reduces the required tolerances for aligning the various electrode layers, as compared to other design configurations including the non-self-aligned approach and also greatly simplifies the process complexity and cost. A process sequence for both integrated and non-integrated versions of the self-aligned DPG device is described. Additionally, an advanced self-aligned DPG device that eliminates the need for a charge dissipating coating or layer to be used on the device is described. Finally, a fabrication process for the implementation of both integrated and non-integrated versions of the advanced self-aligned DPG device is described.
    Type: Application
    Filed: February 19, 2016
    Publication date: August 11, 2016
    Inventors: Michael A. HUFF, Michael PEDERSEN
  • Patent number: 9312103
    Abstract: A dynamic pattern generator (DPG) device and method of making a DPG device are disclosed. The DPG device is used in semiconductor processing tools that require multiple electron-beams, such as direct-write lithography. The device is a self-aligned DPG device that enormously reduces the required tolerances for aligning the various electrode layers, as compared to other design configurations including the non-self-aligned approach and also greatly simplifies the process complexity and cost. A process sequence for both integrated and non-integrated versions of the self-aligned DPG device is described. Additionally, an advanced self-aligned DPG device that eliminates the need for a charge dissipating coating or layer to be used on the device is described. Finally, a fabrication process for the implementation of both integrated and non-integrated versions of the advanced self-aligned DPG device is described.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 12, 2016
    Assignee: CORPORATION FOR NATIONAL RESEARCH INITIATIVES
    Inventors: Michael A. Huff, Michael Pedersen
  • Publication number: 20150371890
    Abstract: A method is disclosed for manufacturing integrated circuits, microelectronics, micro-electro-mechanical systems (MEMS), nano-electro-mechanical systems (NEMS), photonic, and any micro- and nano-fabricated devices and systems designs that allow these designs to be kept secure. The manufacturing of the devices in the substrates is performed in a traditional manner at a foundry that can be located anywhere in the world., The manufacturing at this foundry is stopped just before the fabrication of the first layer of electrical interconnects. At this stage, the semiconductor substrates with the devices, minus electrical interconnects, are sent back to the design organization (or their designated trusted foundry) to perform the fabrication of the electrical interconnects to complete the entire manufacturing process.
    Type: Application
    Filed: June 19, 2014
    Publication date: December 24, 2015
    Inventor: Michael A. Huff
  • Patent number: 9099248
    Abstract: A variable capacitor device is disclosed in which the capacitive tuning ratio and quality factor are increased to very high levels, and in which the capacitance value of the device is tuned and held to a desired value with a high level of accuracy and precision using a laser micromachining tuning process on suitably designed and fabricated capacitor devices. The tuning of the variable capacitor devices can be performed open-loop or closed-loop, depending on the precision of the eventual capacitor value needed or desired. Furthermore, the tuning to a pre-determined value can be performed before the variable capacitor device is connected to a circuit, or alternatively, the tuning to a desired value can be performed after the variable capacitor device has been connected into a circuit.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: August 4, 2015
    Assignee: Corporation for National Research Iniatives
    Inventors: Michael A. Huff, Mehmet Ozgur
  • Patent number: 9053929
    Abstract: A method and system are disclosed for controlling the state of stress in deposited thin films on microelectronics wafers for the integration of MEMS and NEMS devices with microelectronics. According to the method and system, various process parameters including: process pressure; substrate temperature; deposition rate; and ion-beam energies (controlled via the ion beam current, voltage, signal frequency and duty cycle) are varied using a step-by-step methodology to arrive at a pre-determined desired state of stress in thin films deposited using PVD at low temperatures and desired stress states onto wafers or substrates having microelectronics processing performed on them.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: June 9, 2015
    Assignee: Corporation For National Research Initiatives
    Inventors: Michael A. Huff, Paul Sunal
  • Patent number: 9019686
    Abstract: A variable capacitor device is disclosed in which the capacitive tuning ratio and quality factor are increased to very high levels, and in which the capacitance value of the device is tuned and held to a desired value with a high level of accuracy and precision using a laser micromachining tuning process on suitably designed and fabricated capacitor devices. The tuning of the variable capacitor devices can be performed open-loop or closed-loop, depending on the precision of the eventual capacitor value needed or desired. Furthermore, the tuning to a pre-determined value can be performed before the variable capacitor device is connected to a circuit, or alternatively, the tuning to a desired value can be performed after the variable capacitor device has been connected into a circuit.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 28, 2015
    Assignee: Corporation for National Research Initiatives
    Inventors: Michael A. Huff, Mehmet Ozgur
  • Patent number: 8983414
    Abstract: A communication system front-end architecture and a method of fabricating same are disclosed in which a diverse set of semiconductor technologies and device types (including CMOS, SiGe CMOS, InP HBTs (heterojunction bipolar transistors), InP HEMTs (high electron mobility transistors), GaN HEMTs, SiC devices, any number from a diverse set of MEMS sensors and actuators, and potentially photonics) is merged onto a single silicon, or other material substrate to thereby enable the development of smaller, lighter, and higher performance systems.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: March 17, 2015
    Assignee: Corporation for National Reseach Initiatives
    Inventors: Mehmet Ozgur, Michael Pedersen, Michael A. Huff
  • Publication number: 20150034592
    Abstract: A method or process is disclosed for etching deep, high-aspect ratio features into silicon dioxide material layers and substrates, including glass, fused silica, quartz, or similar materials, using a plasma etch technology. The method has application in the fabrication and manufacturing of MEMS, microelectronic, micro-mechanical, photonic and nanotechnology devices in which silicon dioxide material layers or substrates are used and must be patterned and etched. Devices that benefit from the method described in this invention include the fabrication of MEMS gyroscopes, resonators, oscillators, microbalances, accelerometers, for example. The etch method or process allows etch depths ranging from below 10 microns to over 1 millimeter and aspect ratios from less than 1 to 1 to over 10 to 1 with etched feature sidewalls having vertical or near vertical angles. Additionally, the disclosed method provides requirements of the etched substrates to reduce or eliminate undesired effects of an etch.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Applicant: Corporation For National Research Initiatives
    Inventors: Michael A. Huff, Michael Pedersen
  • Patent number: 8895338
    Abstract: An improved method for the fabrication of Micro-Electro-Mechanical Systems (MEMS), Nano-Electro-Mechanical Systems (NEMS), Photonics, Nanotechnology, 3-Dimensional Integration, Micro- and Nano-Fabricated Devices and Systems for both rapid prototyping development and manufacturing is disclosed. The method includes providing a plurality of different standardized and repeatable process modules usable in fabricating the devices and systems, defining a process sequence for fabricating a predefined one of the devices or systems, and identifying a series of the process modules that are usable in performing the defined process sequence and thus in fabricating the predefined device or system.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: November 25, 2014
    Assignee: Corporation for National Research Initiatives
    Inventor: Michael A. Huff
  • Patent number: 8852378
    Abstract: The present invention relates generally to a metallic alloy composed of Titanium and Tungsten that together form an alloy having a Coefficient of Thermal Expansion (CTE), wherein the content of the respective constituents can be adjusted so that the alloy material can be nearly perfectly matched to that of a commonly used semiconductor and ceramic materials. Moreover, alloys of Titanium-Tungsten have excellent electrical and thermal conductivities making them ideal material choices for many electrical, photonic, thermoelectric, MMIC, NEMS, nanotechnology, power electronics, MEMS, and packaging applications. The present invention describes a method for designing the TiW alloy so as to nearly perfectly match the coefficient of thermal expansion of a large number of different types of commonly used semiconductor and ceramic materials.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: October 7, 2014
    Assignee: Corporation for National Research Initiatives
    Inventors: Michael A. Huff, Paul Sunal
  • Patent number: 8790534
    Abstract: A system and method are disclosed for the precision fabrication of Micro-Electro-Mechanical Systems (MEMS), Nano-Electro-Mechanical Systems (NEMS), Microsytems, Nanosystems, Photonics, 3-D integration, heterogeneous integration, and Nanotechology devices and structures. The disclosed system and method can also be used in any fabrication technology to increase the precision and accuracy of the devices and structures being made compared to conventional means of implementation. A platform holds and moves a substrate to be machined during machining and a plurality of lasers and/or ion beams are provided that are capable of achieving predetermined levels of machining resolution and precision and machining rates for a predetermined application. The plurality of lasers and/or ion beams comprises a plurality of the same type of laser and/or ion beam.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: July 29, 2014
    Assignee: Corporation for National Research Initiatives
    Inventor: Michael A. Huff
  • Patent number: 8667726
    Abstract: A handguard encompasses the barrel of a replica firearm and supports one or more accessory rails. The handguard and the barrel have respective axes, which are offset from one another. The offset provides a pleasing aesthetic and a lower profile to accommodate sights without unduly obscuring the view of the shooter.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: March 11, 2014
    Inventor: Michael Huff
  • Patent number: 8660157
    Abstract: A laser diode system is disclosed in which a substrate made of a semiconductor material containing laser diodes is bonded to a substrate made from a metallic material without the use of any intermediate joining or soldering layers between the two substrates. The metal substrate acts as an electrode and/or heat sink for the laser diode semiconductor substrate. Microchannels may be included in the metal substrate to allow coolant fluid to pass through, thereby facilitating the removal of heat from the laser diode substrate. A second metal substrate including cooling fluid microchannels may also be bonded to the laser diode substrate to provide greater heat transfer from the laser diode substrate. The bonding of the substrates at low temperatures, combined with modifications to the substrate surfaces, enables the realization of a low electrical resistance interface and a low thermal resistance interface between the bonded substrates.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: February 25, 2014
    Assignee: Corporation for National Research Initiatives
    Inventors: Michael A. Huff, Jonah Jacob
  • Publication number: 20130344819
    Abstract: A communication system front-end architecture and a method of fabricating same are disclosed in which a diverse set of semiconductor technologies and device types (including CMOS, SiGe CMOS, InP HBTs (heterojunction bipolar transistors), InP HEMTs (high electron mobility transistors), GaN HEMTs, SiC devices, any number from a diverse set of MEMS sensors and actuators, and potentially photonics) is merged onto a single silicon, or other material substrate to thereby enable the development of smaller, lighter, and higher performance systems.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 26, 2013
    Applicant: Corporation for National Research Intiatives
    Inventors: Mehmet Ozgur, Michael Pedersen, Michael A. Huff
  • Publication number: 20130008875
    Abstract: A variable capacitor device is disclosed in which the capacitive tuning ratio and quality factor are increased to very high levels, and in which the capacitance value of the device is tuned and held to a desired value with a high level of accuracy and precision using a laser micromachining tuning process on suitably designed and fabricated capacitor devices. The tuning of the variable capacitor devices can be performed open-loop or closed-loop, depending on the precision of the eventual capacitor value needed or desired. Furthermore, the tuning to a pre-determined value can be performed before the variable capacitor device is connected to a circuit, or alternatively, the tuning to a desired value can be performed after the variable capacitor device has been connected into a circuit.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 10, 2013
    Applicant: Corporation for National Research Initiatives
    Inventors: Michael A. HUFF, Mehmet Ozgur
  • Patent number: D743503
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: November 17, 2015
    Inventor: Michael Huff