Abstract: A control system in a data storage apparatus and associated methods for attempting to accommodate the vibrations resulting from rotating a data storage medium. The control system comprises a neural network which utilizes detected vibrations resulting from the rotation of data storage media to learn the characteristics of the rotational imbalance of rotating data storage media. Thereafter, the rotation of a data storage medium and/or movement of a data head is controlled based on the characteristics learned.

Abstract: An apparatus and method for improving the input/output performance of a computer system under the control of a multi-tasking, multi-threaded operating system. In particular, the invention provides an apparatus and method to chain contiguous DMA scatter gather sub blocks of a PRD table for channel 0 with contiguous DMA scatter gather sub blocks of a PRD table for channel 1, using a single data manager, while maintaining maximum media bandwidth. DMA block transfers are scheduled based on the availability of data from the I/O device's buffer memory, thus minimizing both media or network idle time as well as minimizing I/O bus idle time. Near maximum aggregate bandwidth of multiple I/O buses and their associated devices is obtained. The apparatus and method thus provides significant performance advantages over prior techniques having two I/O channel systems implemented with a single data manager.

Abstract: A method an corresponding apparatus for improving the input/output performance of a computer system under the control of a multi-tasking, multi-threaded operating system. In particular, the invention provides an apparatus and method to interleave contiguous DMA scatter/gather sub blocks of a PRD table corresponding to a first I/O channel with contiguous DMA scatter/gather sub blocks of a PRD table corresponding to a second I/O channel, using a single data manager, while maintaining maximum media bandwidth. DMA block transfers are scheduled by the single data manager based on the availability of data from the I/O devices' buffer memories, thus minimizing both media or network idle time as well as minimizing I/O bus idle time. Near maximum aggregate bandwidth of multiple I/O buses and their associated devices is obtained. The apparatus and method thus provides significant performance advantages over prior techniques having two I/O channel systems implemented with a single data manager.

Abstract: An improved method for interfacing a human user to the combination of an expert system and a computer aided design system, characterized in that the expert system advice is provided in various formats, the expert system provides for interrupted operation with usable intermediate advice, and expert system advice is transportable in relative correspondence into the computer aided design system schematic display environment.

Abstract: A system memory for a reduction processor which evaluates programs stored as binary graphs employing variable-free applicative language codes. These graphs are made up of nodes, each of which exists in memory and contains as its most significant bit a mark bit which when set indicates that the node is being used in a graph and when reset indicates that the node or storage location is available for future use by the processor. In order to accommodate the scanning of a number of storage locations in parallel, the system memory is divided into a node memory and the mark bit memory so that the mark bits for a number of sequential storage locations can be examined in parallel to determine which node locations are free for use by the graph manager.