Patents by Inventor Michael C. Lam
Michael C. Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8769474Abstract: Disclosed are methods, systems, and articles of manufacture for using pattern matching with an integrated circuit layout including recognizing shapes within the IC layout, identifying features for the shapes, and extracting situations for the respective features. The method may further include simulating the situations to determine a set of situations for modification based on an OPC requirement, modifying the set of situations to improve satisfaction of the OPC requirement, and reintegrating the modified set of situations into the IC layout. The method may also include simulating a subset of the extracted situations to determine aerial images of the subset, and tiling the subset of situations to form a larger aerial image. The method may also include removing overlap from a window based on the situations extracted for the window, calculating a density for each of the situations, and calculating a density for the window based on the density.Type: GrantFiled: October 18, 2010Date of Patent: July 1, 2014Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 8631373Abstract: Systems, methodologies and technologies for the analysis and transformation of integrated circuit layouts using situations are disclosed. A method for transforming an integrated circuit (IC) layout includes recognizing shapes within the IC layout, identifying features for each of the shapes and extracting situations for the respective features. Extracted situations can be used to improve optical proximity correction (OPC) of the IC layout. This improved OPC includes extracting the situations, simulating the situations to determine a set of the situations identified for modification based on failing to satisfy a desired OPC tolerance level, modifying the set of situations to improve satisfaction of the desired OPC tolerance level, and reintegrating the modified set of situations into the IC layout. Extracted situations can also be used to improve aerial image simulation of the IC layout.Type: GrantFiled: December 22, 2009Date of Patent: January 14, 2014Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 8365103Abstract: Systems and methods for creating and implementing two-dimensional (2D), image-based design rules (IBDRs) are disclosed. Techniques for creating 2D IBDR can include identifying a search pattern that is representative of a 2D pattern of interest of a design, creating a pattern representation based on the search pattern, defining an anchor point for the pattern representation, and assigning weights to elements of the pattern representation. The 2D MDR can be used in systems and method for searching a design by comparing the 2D IBDR to the design. A number of 2D IBDRs can be merged into a subset of similar 2D IBDRs by characterizing desired rule geometries, sorting the 2D IBDRs into groups according to the desired rule geometries, merging the groups of 2D IBDRs into a single representative search pattern. Additionally, standard design rules can be created from the disclosed 2D IBDRs.Type: GrantFiled: December 22, 2009Date of Patent: January 29, 2013Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 8327299Abstract: Systems and methods for creating and implementing two-dimensional (2D), image-based design rules (IBDRs) are disclosed. Techniques for creating 2D IBDR can include identifying a search pattern that is representative of a 2D pattern of interest of a design, creating a pattern representation based on the search pattern, defining an anchor point for the pattern representation, and assigning weights to elements of the pattern representation. The 2D MDR can be used in systems and method for searching a design by comparing the 2D IBDR to the design. A number of 2D IBDRs can be merged into a subset of similar 2D IBDRs by characterizing desired rule geometries, sorting the 2D IBDRs into groups according to the desired rule geometries, merging the groups of 2D IBDRs into a single representative search pattern. Additionally, standard design rules can be created from the disclosed 2D IBDRs.Type: GrantFiled: December 22, 2009Date of Patent: December 4, 2012Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 8091047Abstract: Systems and methods for creating and implementing two-dimensional (2D), image-based design rules (IBDRs) are disclosed. Techniques for creating 2D IBDR can include identifying a search pattern that is representative of a 2D pattern of interest of a design, creating a pattern representation based on the search pattern, defining an anchor point for the pattern representation, and assigning weights to elements of the pattern representation. The 2D MDR can be used in systems and method for searching a design by comparing the 2D IBDR to the design. A number of 2D IBDRs can be merged into a subset of similar 2D IBDRs by characterizing desired rule geometries, sorting the 2D IBDRs into groups according to the desired rule geometries, merging the groups of 2D IBDRs into a single representative search pattern. Additionally, standard design rules can be created from the disclosed 2D IBDRs.Type: GrantFiled: December 22, 2009Date of Patent: January 3, 2012Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 7831942Abstract: Systems and methods for creating and implementing two-dimensional (2D), image-based design rules (IBDRs) are disclosed. Techniques for creating 2D IBDR can include identifying a search pattern that is representative of a 2D pattern of interest of a design, creating a pattern representation based on the search pattern, defining an anchor point for the pattern representation, and assigning weights to elements of the pattern representation. The 2D IBDR can be used in systems and method for searching a design by comparing the 2D IBDR to the design. A number of 2D IBDRs can be merged into a subset of similar 2D IBDRs by characterizing desired rule geometries, sorting the 2D IBDRs into groups according to the desired rule geometries, merging the groups of 2D IBDRs into a single representative search pattern. Additionally, standard design rules can be created from the disclosed 2D IBDRs.Type: GrantFiled: December 12, 2006Date of Patent: November 9, 2010Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 7818707Abstract: Systems, methodologies and technologies for the analysis and transformation of integrated circuit layouts using situations are disclosed. A method for transforming an integrated circuit (IC) layout includes recognizing shapes within the IC layout, identifying features for each of the shapes and extracting situations for the respective features. Extracted situations can be used to improve optical proximity correction (OPC) of the IC layout. This improved OPC includes extracting the situations, simulating the situations to determine a set of the situations identified for modification based on failing to satisfy a desired OPC tolerance level, modifying the set of situations to improve satisfaction of the desired OPC tolerance level, and reintegrating the modified set of situations into the IC layout. Extracted situations can also be used to improve aerial image simulation of the IC layout.Type: GrantFiled: December 12, 2006Date of Patent: October 19, 2010Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 7752577Abstract: Systems and methods for creating and implementing two-dimensional (2D), image-based design rules (IBDRs) are disclosed. Techniques for creating 2D IBDR can include identifying a search pattern that is representative of a 2D pattern of interest of a design, creating a pattern representation based on the search pattern, defining an anchor point for the pattern representation, and assigning weights to elements of the pattern representation. The 2D IBDR can be used in systems and method for searching a design by comparing the 2D IBDR to the design. A number of 2D IBDRs can be merged into a subset of similar 2D IBDRs by characterizing desired rule geometries, sorting the 2D IBDRs into groups according to the desired rule geometries, merging the groups of 2D IBDRs into a single representative search pattern. Additionally, standard design rules can be created from the disclosed 2D IBDRs.Type: GrantFiled: December 12, 2006Date of Patent: July 6, 2010Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 7707542Abstract: Systems, methodologies and technologies for the analysis and transformation of integrated circuit layouts using situations are disclosed. A method for transforming an integrated circuit (IC) layout includes recognizing shapes within the IC layout, identifying features for each of the shapes and extracting situations for the respective features. Extracted situations can be used to improve optical proximity correction (OPC) of the IC layout. This improved OPC includes extracting the situations, simulating the situations to determine a set of the situations identified for modification based on failing to satisfy a desired OPC tolerance level, modifying the set of situations to improve satisfaction of the desired OPC tolerance level, and reintegrating the modified set of situations into the IC layout. Extracted situations can also be used to improve aerial image simulation of the IC layout.Type: GrantFiled: December 12, 2006Date of Patent: April 27, 2010Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 7661087Abstract: Systems, methodologies and technologies for the analysis and transformation of integrated circuit layouts using situations are disclosed. A method for transforming an integrated circuit (IC) layout includes recognizing shapes within the IC layout, identifying features for each of the shapes and extracting situations for the respective features. Extracted situations can be used to improve optical proximity correction (OPC) of the IC layout. This improved OPC includes extracting the situations, simulating the situations to determine a set of the situations identified for modification based on failing to satisfy a desired OPC tolerance level, modifying the set of situations to improve satisfaction of the desired OPC tolerance level, and reintegrating the modified set of situations into the IC layout. Extracted situations can also be used to improve aerial image simulation of the IC layout.Type: GrantFiled: December 12, 2006Date of Patent: February 9, 2010Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 7653892Abstract: Systems and methods for creating and implementing two-dimensional (2D), image-based design rules (IBDRs) are disclosed. Techniques for creating 2D IBDR can include identifying a search pattern that is representative of a 2D pattern of interest of a design, creating a pattern representation based on the search pattern, defining an anchor point for the pattern representation, and assigning weights to elements of the pattern representation. The 2D IBDR can be used in systems and method for searching a design by comparing the 2D IBDR to the design. A number of 2D IBDRs can be merged into a subset of similar 2D IBDRs by characterizing desired rule geometries, sorting the 2D IBDRs into groups according to the desired rule geometries, merging the groups of 2D IBDRs into a single representative search pattern. Additionally, standard design rules can be created from the disclosed 2D IBDRs.Type: GrantFiled: August 18, 2005Date of Patent: January 26, 2010Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre
-
Patent number: 7418693Abstract: Systems, methodologies and technologies for the analysis and transformation of integrated circuit layouts using situations are disclosed. A method for transforming an integrated circuit (IC) layout includes recognizing shapes within the IC layout, identifying features for each of the shapes and extracting situations for the respective features. Extracted situations can be used to improve optical proximity correction (OPC) of the IC layout. This improved OPC includes extracting the situations, simulating the situations to determine a set of the situations identified for modification based on failing to satisfy a desired OPC tolerance level, modifying the set of situations to improve satisfaction of the desired OPC tolerance level, and reintegrating the modified set of situations into the IC layout. Extracted situations can also be used to improve aerial image simulation of the IC layout.Type: GrantFiled: August 18, 2005Date of Patent: August 26, 2008Assignee: Cadence Design Systems, Inc.Inventors: Frank E. Gennari, Ya-Chieh Lai, Matthew W. Moskewicz, Michael C. Lam, Gregory R. McIntyre