Abstract: An example test system includes instruments for controlling testing. Each instrument may be controlled by a processing unit. Each processing unit may be configured to operate on portions of a test program relevant to an instrument that the processing unit controls. A synchronization mechanism operates with at least some processing units to produce a synchronized sequence of actions, measurements, or measurements and actions at a test instrument interface absent intervention from a centralized controller.

Abstract: An example test system includes instruments for controlling testing. Each instrument may be controlled by a processing unit. Each processing unit may be configured to operate on portions of a test program relevant to an instrument that the processing unit controls. A synchronization mechanism operates with at least some processing units to produce a synchronized sequence of actions, measurements, or measurements and actions at a test instrument interface absent intervention from a centralized controller.

Abstract: A system and method for economically yet thoroughly testing serial ports of electronic devices includes a receiver and a transmitter. The receiver is coupled to a TX line of a device under test for receiving an input serial bit stream from the device under test. The transmitter is coupled to a RX line of the device under test for providing an output serial bit stream to the device under test. The receiver is coupled to the transmitter for establishing a loopback connection. A time distortion circuit is interposed between the receiver and the transmitter, for adding predetermined amounts of timing distortion to the output serial bit stream. In addition, a selector is interposed between the receiver and the transmitter, for selecting between the receiver and a direct input. The direct input provides an algorithmic test signal that differs from the input serial bit stream received by the receiver.

Abstract: A system and method for economically yet thoroughly testing serial ports of electronic devices includes a receiver and a transmitter. The receiver is coupled to a TX line of a device under test for receiving an input serial bit stream from the device under test. The transmitter is coupled to a RX line of the device under test for providing an output serial bit stream to the device under test. The receiver is coupled to the transmitter for establishing a loopback connection. A time distortion circuit is interposed between the receiver and the transmitter, for adding predetermined amounts of timing distortion to the output serial bit stream. In addition, a selector is interposed between the receiver and the transmitter, for selecting between the receiver and a direct input. The direct input provides an algorithmic test signal that differs from the input serial bit stream received by the receiver.

Abstract: A pin electronics circuit for automatic test equipment includes first and second sampling circuits for sampling first and second legs of a differential signal produced by a DUT (Device Under Test). Timing signals activate the first and second sampling circuits to sample the legs of the differential signal at precisely defined instants of time to produce first and second collections of samples. To deskew the legs of a differential signal with respect to each other, corresponding features within the first and second collections are identified and a difference is taken between them. The differential skew can then be applied to correct measurements of differential signals.

Abstract: A pin electronics circuit for automatic test equipment includes first and second sampling circuits for sampling first and second legs of a differential signal produced by a DUT (Device Under Test). Timing signals activate the first and second sampling circuits to sample the legs of the differential signal at precisely defined instants of time to produce first and second collections of samples. To deskew the legs of a differential signal with respect to each other, corresponding features within the first and second collections are identified and a difference is taken between them. The differential skew can then be applied to correct measurements of differential signals.

Abstract: A pre-conditioner for enabling high-speed time interval measurements in an ATE system having a relatively low-bandwidth pathway between a UUT and a timer/counter includes a frequency divider and a D flip-flop located near the UUT. The frequency divider receives a first input signal from the UUT and produces a first output signal having a frequency equal to 1/N times the frequency of the first input signal. The first output signal connects over the low-bandwidth pathway to a first channel of the timer/counter. The first output signal also connects to the D input of the D flip-flop. The pre-conditioner receives a second input signal from the UUT that drives the CLOCK input of the D flip-flop. The Q output of the D flip-flop supplies a second output of the pre-conditioner. The second output connects over the low-bandwidth pathway to a second channel of the timer/counter.

Abstract: A system and method for economically yet thoroughly testing serial ports of electronic devices includes a receiver and a transmitter. The receiver is coupled to a TX line of a device under test for receiving an input serial bit stream from the device under test. The transmitter is coupled to a RX line of the device under test for providing an output serial bit stream to the device under test. The receiver is coupled to the transmitter for establishing a loopback connection. A time distortion circuit is interposed between the receiver and the transmitter, for adding predetermined amounts of timing distortion to the output serial bit stream. In addition, a selector is interposed between the receiver and the transmitter, for selecting between the receiver and a direct input. The direct input provides an algorithmic test signal that differs from the input serial bit stream received by the receiver.

Abstract: A method for operating automatic test equipment for capturing digital data produced by a semiconductor device under test, whereby the digital data is repetitively sampled to produce a series of sampled data pairs. The digital data and the sampling frequency can be non-coherent. As a result, the digital data can be sampled early relative to some bits and late relative to other bits. The sampled data pairs that are captured while these shifts take place, from early-to-late sampling or from late-to-early sampling, are then assigned to respective groups. A minimum number of bit patterns, corresponding to the sampled digital data, is then derived from contiguous groups of sampled data pairs, and compared with expected bit patterns. The method is especially useful for capturing digital data with drifting frequency.

Abstract: A tester that produces digital timing signals having fast data rates including multiple groups of timing generators, multiple "exclusive-or" gates, and an "or" gate. Each group of timing generators is connected to an exclusive-or gate, and the output of each exclusive-or gate is coupled to the or gate. The digital timing signals are encoded such that the timing generators in each group may assert timing pulses only during specified cycles within a series of clock cycles. Each combination of timing generators within a group either asserting their respective encoded timing signals, or not asserting any timing signals during the series of clock cycles, generates a unique serial data stream. The serial data streams generated by the groups of timing generators are then combined to produce a new digital timing signal having a data rate that is faster than the data rate of the encoded digital timing signals.

Abstract: A method for automatically testing digital electronic circuits and performing time measurements whereby a digital signal having a frequency f1 is sampled at a rate equal to f2. The sampling frequency f2 is either slightly less than or slightly greater than f1. As a result, the digital signal is sampled at either a slightly later position in time or a slightly earlier position in time during each successive period of the digital signal. After the entire interval of interest on the digital signal has been sampled, either the number of logical high data samples or the number of logical low data samples is determined. Finally, the number of data samples is multiplied by the effective time period between data samples. In this way, pulse widths on digital signals can be measured with both high resolution and good linearity. This method of time measurement may also be used to calibrate an electronic circuit tester.