Patents by Inventor MICHAEL CAVERLEY

MICHAEL CAVERLEY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Flip chip bonding onto a photonic integrated circuit
    Patent number: 10816740
    Abstract: Conventional hybrid photonic integrated circuits (PIC) combine one type of semiconductor platform for the main PIC, and a different type of semiconductor platform for a secondary chip. Conventional mounting processes include forming a recess in the main PIC, and mating electrical connectors from the secondary chip and the main PIC within the recess. Mating the first and second electrical connectors in the recess increases the complexity of forming the main PIC, and hampers heat dissipation from secondary chip through oxide layers in the main PIC. Providing a conductive, e.g. redistribution, layer from the first electrode along the bottom and sides of the recess eliminates the complexity in forming the main PIC, and enables the first electrical connector to be mounted directly onto a more thermally conductive substrate material.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: October 27, 2020
    Assignee: Elenion Technologies, LLC
    Inventors: Ari Novack, Saeed Fathololoumi, Michael Caverley
  • FLIP CHIP BONDING ONTO A PHOTONIC INTEGRATED CIRCUIT
    Publication number: 20200249405
    Abstract: Conventional hybrid photonic integrated circuits (PIC) combine one type of semiconductor platform for the main PIC, and a different type of semiconductor platform for a secondary chip. Conventional mounting processes include forming a recess in the main PIC, and mating electrical connectors from the secondary chip and the main PIC within the recess. Mating the first and second electrical connectors in the recess increases the complexity of forming the main PIC, and hampers heat dissipation from secondary chip through oxide layers in the main PIC. Providing a conductive, e.g. redistribution, layer from the first electrode along the bottom and sides of the recess eliminates the complexity in forming the main PIC, and enables the first electrical connector to be mounted directly onto a more thermally conductive substrate material.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 6, 2020
    Inventors: ARI NOVACK, SAEED FATHOLOLOUMI, MICHAEL CAVERLEY