Abstract: Presented are embodiments of methods and systems for library-based compilation and dispatch to automatically spread computations of a program across heterogeneous cores in a processing system. The source program contains a parallel-programming keyword, such as mapreduce, from a high-level, library-oriented parallel programming language. The compiler inserts one or more calls for a generic function, associated with the parallel-programming keyword, into the compiled code. A runtime library provides a predicate-based library system that includes multiple hardware specific implementations (“variants”) of the generic function. A runtime dispatch engine dynamically selects the best-available (e.g., most specific) variant, from a bundle of hardware-specific variants, for a given input and machine configuration.

Abstract: Presented are embodiments of methods and systems for library-based compilation and dispatch to automatically spread computations of a program across heterogeneous cores in a processing system. The source program contains a parallel-programming keyword, such as mapreduce, from a high-level, library-oriented parallel programming language. The compiler inserts one or more calls for a generic function, associated with the parallel-programming keyword, into the compiled code. A runtime library provides a predicate-based library system that includes multiple hardware specific implementations (“variants”) of the generic function. A runtime dispatch engine dynamically selects the best-available (e.g., most specific) variant, from a bundle of hardware-specific variants, for a given input and machine configuration.

Abstract: The present invention provides methods and apparatus for highly efficient parallel operations using a reduction unit. In a particular aspect, there is provided an apparatus and method for parallel computing. In each of the apparatus and method, there are performed independent operations by a plurality of processing units to obtain a sequence of results from each of the processing units, the step of performing independent operations including accessing data from a common memory by each of the plurality of processing units. There are also operations performed upon each of the results obtained from each of the processing units using a reduction unit to obtain a globally coherent and strictly consistent state signal, the globally coherent and strictly consistent state signal being fed back to each of the plurality of processing units in order to synchronize operations therebetween.