Patents by Inventor Michael E. Stanley

Michael E. Stanley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240116872
    Abstract: The invention provides novel inhibitors of hedgehog signaling that are useful as a therapeutic agents for treating malignancies where the compounds have the general formula I: wherein A, X, Y R1, R2, R3, R4, m and n are as described herein.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 11, 2024
    Applicants: GENENTECH, INC., CURIS, INC
    Inventors: Janet L. GUNZNER-TOSTE, Daniel SUTHERLIN, Mark S. STANLEY, Liang BAO, Georgette M. CASTANEDO, Rebecca L. LALONDE, Shumei WANG, Mark E. REYNOLDS, Scott J. SAVAGE, Kimberly MALESKY, Michael S. DINA, Michael F.T. KOEHLER
  • Patent number: 10209075
    Abstract: A mechanism is provided to determine orientation of a device that includes sources of electromagnetic interference. Data generated by one or more gyroscopes in the device, in conjunction with data generated by one or more accelerometers, can be used to generate an estimate of the change of orientation of the device from the time of a last accurate magnetometer reading. In one embodiment, in order to conserve system power, the gyroscope is kept powered down or in a stand-by state until receiving a control signal to power up. The control signal is provided in advance of the source of electromagnetic interference being powered up, thereby providing an accurate starting point from which magnetometer orientation estimates may be calculated during such interference.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: February 19, 2019
    Assignee: NXP USA, Inc.
    Inventor: Michael E. Stanley
  • Publication number: 20160094766
    Abstract: A mechanism is provided to determine orientation of a device that includes sources of electromagnetic interference. Data generated by one or more gyroscopes in the device, in conjunction with data generated by one or more accelerometers, can be used to generate an estimate of the change of orientation of the device from the time of a last accurate magnetometer reading. In one embodiment, in order to conserve system power, the gyroscope is kept powered down or in a stand-by state until receiving a control signal to power up. The control signal is provided in advance of the source of electromagnetic interference being powered up, thereby providing an accurate starting point from which magnetometer orientation estimates may be calculated during such interference.
    Type: Application
    Filed: September 30, 2014
    Publication date: March 31, 2016
    Inventor: MICHAEL E. STANLEY
  • Patent number: 9110142
    Abstract: Embodiments include systems that include at least one integrated circuit (IC) and methods for their testing. Each IC includes an input interconnect to receive an input signal, a test enable interconnect to receive a test enable signal, and a controller (e.g., a TAP controller) for performing testing of the integrated circuit based on values in at least one register (values corresponding to the input signal). Each IC also includes an input port and a multiplexer coupled to the first input interconnect, the at least one register, and the input port. The multiplexer is controllable to pass the input signal to the input port in response to non-assertion of the test enable signal, and to pass the input signal to the at least one register in response to assertion of the test enable signal. When the system includes multiple controllers, each controller may implement a different opcode-to-instruction mapping.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: August 18, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael E. Stanley, Joseph S. Vaccaro
  • Patent number: 8915116
    Abstract: A mechanism by which a MEMS gyroscope sensor can be calibrated using data gathered from other sensors in a system incorporating the MEMS gyroscope sensor is provided. Data gathered from an accelerometer and a magnetometer in fixed orientation relative to the gyroscope is used to calculate changes in orientation of a system. A constant acceleration vector measured by the accelerometer and a constant magnetic vector measured by the magnetometer are used as reference vectors in a solution to Wahba's problem to calculate a rotation matrix providing the system's orientation with respect to those two constant vectors. By comparing changes in orientation from one time to a next time, measured rates of angular change can be calculated. The measured rates of angular change can be used along with observed gyroscope rates of angular change as input to a linear regression algorithm, which can be used to compute gyroscope trim parameters.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: December 23, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Michael E. Stanley
  • Publication number: 20140202229
    Abstract: A mechanism by which a MEMS gyroscope sensor can be calibrated using data gathered from other sensors in a system incorporating the MEMS gyroscope sensor is provided. Data gathered from an accelerometer and a magnetometer in fixed orientation relative to the gyroscope is used to calculate changes in orientation of a system. A constant acceleration vector measured by the accelerometer and a constant magnetic vector measured by the magnetometer are used as reference vectors in a solution to Wahba's problem to calculate a rotation matrix providing the system's orientation with respect to those two constant vectors. By comparing changes in orientation from one time to a next time, measured rates of angular change can be calculated. The measured rates of angular change can be used along with observed gyroscope rates of angular change as input to a linear regression algorithm, which can be used to compute gyroscope trim parameters.
    Type: Application
    Filed: January 23, 2013
    Publication date: July 24, 2014
    Inventor: Michael E. Stanley
  • Patent number: 8756467
    Abstract: Embodiments of integrated circuits include a first input interconnect, a second input interconnect, an output interconnect, a shift register, a select register, a test access port (TAP) controller, and select register decode circuitry. The TAP controller is coupled to the first input interconnect and the select register, and the TAP controller is configured to shift a select value provided on the first input interconnect into the select register. The select register decode circuitry is configured to control, based on the select value, which of a plurality of test data output signals are provided to the output interconnect, where the plurality of test data output signals includes a first test data output signal and a second test data output signal. The first test data output signal is provided by the shift register, and the second test data output signal is received from a second integrated circuit on the second input interconnect.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: June 17, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Joseph S. Vaccaro, Michael E. Stanley
  • Publication number: 20130139015
    Abstract: Embodiments of integrated circuits include a first input interconnect, a second input interconnect, an output interconnect, a shift register, a select register, a test access port (TAP) controller, and select register decode circuitry. The TAP controller is coupled to the first input interconnect and the select register, and the TAP controller is configured to shift a select value provided on the first input interconnect into the select register. The select register decode circuitry is configured to control, based on the select value, which of a plurality of test data output signals are provided to the output interconnect, where the plurality of test data output signals includes a first test data output signal and a second test data output signal. The first test data output signal is provided by the shift register, and the second test data output signal is received from a second integrated circuit on the second input interconnect.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Joseph S. Vaccaro, Michael E. Stanley
  • Publication number: 20130085704
    Abstract: Embodiments include systems that include at least one integrated circuit (IC) and methods for their testing. Each IC includes an input interconnect to receive an input signal, a test enable interconnect to receive a test enable signal, and a controller (e.g., a TAP controller) for performing testing of the integrated circuit based on values in at least one register (values corresponding to the input signal). Each IC also includes an input port and a multiplexer coupled to the first input interconnect, the at least one register, and the input port. The multiplexer is controllable to pass the input signal to the input port in response to non-assertion of the test enable signal, and to pass the input signal to the at least one register in response to assertion of the test enable signal. When the system includes multiple controllers, each controller may implement a different opcode-to-instruction mapping.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Michael E. Stanley, Joseph S. Vaccaro
  • Patent number: 7916053
    Abstract: Apparatus and methods are provided for performing a sampling sequence for a plurality of samples. An analog-to-digital conversion module comprises a sampling module, a register, and a sampling control module coupled to the sampling module and the register. The sampling module is configured to convert analog signals into corresponding digital values in response to sampling trigger signals and the register is configured to maintain scan mode criteria for a plurality of samples. The sampling control module is configured to identify a scan mode criterion for a respective sample of the plurality of samples, automatically generate a sampling trigger signal when the scan mode criterion for the respective sample is equal to a first value, and generate the sampling trigger signal in response to a timing trigger signal when the scan mode criterion for the respective sample is equal to a second value.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: March 29, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael E. Stanley, Mark A. Lancaster, Chongli Wu
  • Publication number: 20100245143
    Abstract: Apparatus and methods are provided for performing a sampling sequence for a plurality of samples. An analog-to-digital conversion module comprises a sampling module, a register, and a sampling control module coupled to the sampling module and the register. The sampling module is configured to convert analog signals into corresponding digital values in response to sampling trigger signals and the register is configured to maintain scan mode criteria for a plurality of samples. The sampling control module is configured to identify a scan mode criterion for a respective sample of the plurality of samples, automatically generate a sampling trigger signal when the scan mode criterion for the respective sample is equal to a first value, and generate the sampling trigger signal in response to a timing trigger signal when the scan mode criterion for the respective sample is equal to a second value.
    Type: Application
    Filed: March 30, 2009
    Publication date: September 30, 2010
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Michael E. Stanley, Mark A. Lancaster, Chongli Wu
  • Patent number: 7288977
    Abstract: A pulse width modulator (100) and method that facilitates high resolution pulse width modulation is provided. The pulse width modulator (100) creates a pulse width modulated signal having a duty cycle that is proportional to a controllable delay in the modulator. The pulse width modulator combines a first digitally controllable delay (102) with a delay adjustment (104) to provide the controllable delay. In one embodiment, a digital counter (202) is used to provide coarse delay, with the delay adjustment device (210) coupled to the digital counter (202) to provide the fine, high resolution, delay control. Together the digital counter (202) and delay adjustment device (210) provide high resolution pulse width modulation. In one particular implementation, the analog delay adjustment device (100) comprises a delay block (500) designed to provide delay adjustment that is selectively controllable by changing a capacitance in the device.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: October 30, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Michael E. Stanley
  • Patent number: 5822511
    Abstract: A method for reducing programming or data errors generated by a new computer program or data set when the computer program updates or replaces an existing computer program. A set of baseline output records is generated by running the existing computer program on an input file (step 701). A set of revised output records is generated by running the new computer program with the input file (step 702). The baseline and revised output records are mapped to form an association between corresponding records (step 707). The associated records are compared using tolerance data stored in a control file to produce a plurality of difference records, a portion of which represents the programming or data errors (step 711). The difference records are examined to identify the portion of the difference records corresponding to the programming or data errors for editing the new computer program.
    Type: Grant
    Filed: September 3, 1996
    Date of Patent: October 13, 1998
    Assignee: Motorola, Inc.
    Inventors: Praveen Kashyap, Michael E. Stanley
  • Patent number: 4801825
    Abstract: A circuit is provided which comprises a push-pull switching stage responsive to applied control signals for alternately establishing high and low output voltage levels at an output of the circuit responsive to control signals which are derived from an applied input logic signal and which is disabled in response to the control signals being disabled for providing a high output impedance at the output. The circuit includes circuitry responsive to an applied disable signal for disabling the control signals while enabling further circuitry, the latter providing a transient current path to improve the transition from the high voltage output level to the high output impedance condition while establishing a pseudo high output impedance at the output of the circuit until the push-pull stage is disabled.
    Type: Grant
    Filed: July 6, 1987
    Date of Patent: January 31, 1989
    Assignee: Motorola, Inc.
    Inventors: Michael E. Stanley, Walter V. Lowe, Byron G. Bynum